Using an optimized queueing network model to support wafer fab design

Wallace J. Hopp, Mark L. Spearman, Sergio Chayet, Karen L. Donohue, Esma Gel

Research output: Contribution to journalArticle

55 Citations (Scopus)

Abstract

We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.

Original languageEnglish (US)
Pages (from-to)119-130
Number of pages12
JournalIIE Transactions (Institute of Industrial Engineers)
Volume34
Issue number2
DOIs
StatePublished - Feb 2002

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Queueing networks
Semiconductor materials
Planning
Fabrication
Costs
Approximation
Network model
Semiconductors
Batch
Queueing
Cycle time
Common features
Simulation
Capacity planning

ASJC Scopus subject areas

  • Industrial and Manufacturing Engineering
  • Management Science and Operations Research

Cite this

Using an optimized queueing network model to support wafer fab design. / Hopp, Wallace J.; Spearman, Mark L.; Chayet, Sergio; Donohue, Karen L.; Gel, Esma.

In: IIE Transactions (Institute of Industrial Engineers), Vol. 34, No. 2, 02.2002, p. 119-130.

Research output: Contribution to journalArticle

Hopp, Wallace J. ; Spearman, Mark L. ; Chayet, Sergio ; Donohue, Karen L. ; Gel, Esma. / Using an optimized queueing network model to support wafer fab design. In: IIE Transactions (Institute of Industrial Engineers). 2002 ; Vol. 34, No. 2. pp. 119-130.
@article{0d884deb789e495db76b295ef3a71f27,
title = "Using an optimized queueing network model to support wafer fab design",
abstract = "We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.",
author = "Hopp, {Wallace J.} and Spearman, {Mark L.} and Sergio Chayet and Donohue, {Karen L.} and Esma Gel",
year = "2002",
month = "2",
doi = "10.1023/A:1011987712718",
language = "English (US)",
volume = "34",
pages = "119--130",
journal = "IISE Transactions",
issn = "2472-5854",
publisher = "Taylor and Francis Ltd.",
number = "2",

}

TY - JOUR

T1 - Using an optimized queueing network model to support wafer fab design

AU - Hopp, Wallace J.

AU - Spearman, Mark L.

AU - Chayet, Sergio

AU - Donohue, Karen L.

AU - Gel, Esma

PY - 2002/2

Y1 - 2002/2

N2 - We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.

AB - We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.

UR - http://www.scopus.com/inward/record.url?scp=0036468703&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0036468703&partnerID=8YFLogxK

U2 - 10.1023/A:1011987712718

DO - 10.1023/A:1011987712718

M3 - Article

AN - SCOPUS:0036468703

VL - 34

SP - 119

EP - 130

JO - IISE Transactions

JF - IISE Transactions

SN - 2472-5854

IS - 2

ER -