TY - GEN
T1 - Ultra-low current resistive memory based on Cu-SiO2
AU - Schindler, Christina
AU - Weides, Martin
AU - Kozicki, Michael
AU - Waser, Rainer
PY - 2008
Y1 - 2008
N2 - Ultra-low current resistive switching in sputtered Cu/SiO2/Pt and Cu/SiO2/Ir structures was investigated. Both Cu and SiO 2 are commonplace in silicon integrated circuits and hence the material system is CMOS compatible. The switching characteristics were very similar to those observed in other solid electrolytes so that the mechanism is assumed to be the same, i.e., based on the formation and rupture of a nanoscale Cu filament. The first current voltage sweep serves as a forming step with write currents as low as 10nA. In the subsequent cycles, the write currents could be reduced to as little as 10pA, making this technology an ideal candidate for energy-starved applications. The switching voltage scaled with the delay time of the current-voltage sweep.
AB - Ultra-low current resistive switching in sputtered Cu/SiO2/Pt and Cu/SiO2/Ir structures was investigated. Both Cu and SiO 2 are commonplace in silicon integrated circuits and hence the material system is CMOS compatible. The switching characteristics were very similar to those observed in other solid electrolytes so that the mechanism is assumed to be the same, i.e., based on the formation and rupture of a nanoscale Cu filament. The first current voltage sweep serves as a forming step with write currents as low as 10nA. In the subsequent cycles, the write currents could be reduced to as little as 10pA, making this technology an ideal candidate for energy-starved applications. The switching voltage scaled with the delay time of the current-voltage sweep.
KW - Nonvolatile memory
KW - Silicon dioxide
KW - Solid electrolyte
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U2 - 10.1109/SNW.2008.5418475
DO - 10.1109/SNW.2008.5418475
M3 - Conference contribution
AN - SCOPUS:77949995934
SN - 9781424420711
T3 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
BT - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
T2 - IEEE 2008 Silicon Nanoelectronics Workshop, SNW 2008
Y2 - 15 June 2008 through 16 June 2008
ER -