Two-terminal nanocrystalline silicon memory device at room temperature

A. H M Kamal, J. Lutzen, B. A. Sanborn, M. V. Sidorov, Michael Kozicki, David Smith, D. K. Ferry

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

We describe the fabrication and operation of a polysilicon room-temperature memory device. The source-drain current-voltage (I-V) characteristics of this device, with floating gate, demonstrate periodic current steps as well as hysteresis generic for a memory device. Electron micrographs show that the channel consists of 3-5 nm silicon grains. A model of single charge trapping controlled conduction through the device channel is suggested.

Original languageEnglish (US)
Pages (from-to)1328-1332
Number of pages5
JournalSemiconductor Science and Technology
Volume13
Issue number11
DOIs
StatePublished - Nov 1998

Fingerprint

Nanocrystalline silicon
Data storage equipment
Charge trapping
Drain current
silicon
room temperature
Silicon
Polysilicon
Hysteresis
Fabrication
Temperature
Electrons
Electric potential
floating
trapping
hysteresis
conduction
fabrication
electric potential
electrons

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Materials Science(all)
  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics

Cite this

Two-terminal nanocrystalline silicon memory device at room temperature. / Kamal, A. H M; Lutzen, J.; Sanborn, B. A.; Sidorov, M. V.; Kozicki, Michael; Smith, David; Ferry, D. K.

In: Semiconductor Science and Technology, Vol. 13, No. 11, 11.1998, p. 1328-1332.

Research output: Contribution to journalArticle

Kamal, A. H M ; Lutzen, J. ; Sanborn, B. A. ; Sidorov, M. V. ; Kozicki, Michael ; Smith, David ; Ferry, D. K. / Two-terminal nanocrystalline silicon memory device at room temperature. In: Semiconductor Science and Technology. 1998 ; Vol. 13, No. 11. pp. 1328-1332.
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