Abstract
As the computational performance of microprocessors continues to grow through the integration of an increasing number of processing cores on a single die, the interconnection network has become the central subsystem for providing the communications infrastructure among the on-chip cores as well as to off-chip memory. Silicon nanophotonics as an interconnect technology offers several promising benefits for future networks-on-chip, including low end-to-end transmission energy and high bandwidth density of waveguides using wavelength division multiplexing. In this work, we propose the use of time-division- multiplexed distributed arbitration in a photonic mesh network composed of silicon micro-ring resonator based photonic switches, which provides round-robin fairness to setting up photonic circuit paths. Our design sustains over 10× more bandwidth and uses less power than the compared network designs. We also observe a 2× improvement in performance for memory-centric application traces using the MORE modeling system.
Original language | English (US) |
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Pages (from-to) | 641-650 |
Number of pages | 10 |
Journal | Journal of Parallel and Distributed Computing |
Volume | 71 |
Issue number | 5 |
DOIs | |
State | Published - May 2011 |
Externally published | Yes |
Keywords
- Memory systems
- Networks-on-chip
- Photonic interconnection networks
- Silicon photonics
- Time division multiplexing
ASJC Scopus subject areas
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computer Networks and Communications
- Artificial Intelligence