Original languageEnglish (US)
Title of host publication2007 International Semiconductor Device Research Symposium, ISDRS
DOIs
StatePublished - 2007
Event2007 International Semiconductor Device Research Symposium, ISDRS - College Park, MD, United States
Duration: Dec 12 2007Dec 14 2007

Other

Other2007 International Semiconductor Device Research Symposium, ISDRS
CountryUnited States
CityCollege Park, MD
Period12/12/0712/14/07

Fingerprint

Oxides
Boundary conditions
Electrodes
Temperature
Hot Temperature
High-k dielectric

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

The role of the temperature boundary conditions on the gate electrode on the heat distribution in 25 nm FD-SOI MOSFETs with SiO2 and gate-stack (high-k dielectric) as the gate oxide. / Raleva, Katerina; Vasileska, Dragica; Goodnick, Stephen.

2007 International Semiconductor Device Research Symposium, ISDRS. 2007. 4422323.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Raleva, K, Vasileska, D & Goodnick, S 2007, The role of the temperature boundary conditions on the gate electrode on the heat distribution in 25 nm FD-SOI MOSFETs with SiO2 and gate-stack (high-k dielectric) as the gate oxide. in 2007 International Semiconductor Device Research Symposium, ISDRS., 4422323, 2007 International Semiconductor Device Research Symposium, ISDRS, College Park, MD, United States, 12/12/07. https://doi.org/10.1109/ISDRS.2007.4422323
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