The emerging Gallium Arsenide digital integrated circuit technology is rapidly becoming well enough established that designers of signal and data processors are planning its incorporation into advanced computational engines of all types. An examination of the characteristics of present and future generation GaAs integrated circuits indicates that they fall into two basic categories: a) relatively modest gate complexity structures which operate at clock rates into the gigahertz range, and b) LSl complexity circuits operating with constrained gate power levels and associated lower clock rates. Both of these chip families will operate at speeds at least as fast as those from the silicon VHSlC world, but at complexity levels much lower than those achieved in current VLSl and VHSlC technologies. Because of the lower complexity of the GaAs technology but the potential for much higher speed, complete exploitation of GaAs digital technology can be achieved only if traditional signal processor architectures are completely recast at the memory layout, logic design, arithmetic implementation, and system levels, and if these issues are considered in combination with system, logic board, and chip layout and packing constraints in a single integrated approach. Moreover, the shorter gate delays typical of GaAs technologies (especially the second-generation heterojunction devices) will require much more attention to the modeling and simulation of the electromagnetic environment at the chip, package, and circuit board levels. This paper reviews these strongly synergistic elements of advanced high-speed signal processor design.
ASJC Scopus subject areas
- Electrical and Electronic Engineering