Abstract
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today's SOC's necessitate hierarchical test generation and system level test composition to meet stringent market requirements. In this paper a novel methodology for testing analog and digital components in a signal path is discussed. Consequent testability analysis can be utilized to reduce DFT requirements, while test translation provides highly effective low cost test. The proposed approach seamlessly propagates test information across the analog/digital divide. Experimental results substantiate the effectiveness of the proposed mixed-signal test synthesis methodology.
Original language | English (US) |
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Title of host publication | Proceedings -Design, Automation and Test in Europe, DATE |
Pages | 128-133 |
Number of pages | 6 |
DOIs | |
State | Published - 2000 |
Externally published | Yes |
Event | Design, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000 - Paris, France Duration: Mar 27 2000 → Mar 30 2000 |
Other
Other | Design, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000 |
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Country/Territory | France |
City | Paris |
Period | 3/27/00 → 3/30/00 |
ASJC Scopus subject areas
- Engineering(all)