Test selection based on high level fault simulation for mixed-signal systems

Sule Ozev, Alex Orailoglu

Research output: Chapter in Book/Report/Conference proceedingChapter

6 Scopus citations

Abstract

Mixed-signal design and test tools are failing to keep apace with the increasing necessity for design exploration at the early stages. We outline a methodology and toolset to enable test selection at the early design stages by providing a high level fault simulator and associated block-level modeling and traversal capabilities. Experimental results show that the outlined methodology provides superior fault simulation speed-ups while helping to minimize the test time for a mixed-signal receiver system.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE VLSI Test Symposium
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages149-154
Number of pages6
StatePublished - 2000
Externally publishedYes
Event18th IEEE VLSI Test Symposium (VTS-2000) - Montreal, Que, Can
Duration: Apr 30 2000May 4 2000

Other

Other18th IEEE VLSI Test Symposium (VTS-2000)
CityMontreal, Que, Can
Period4/30/005/4/00

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Ozev, S., & Orailoglu, A. (2000). Test selection based on high level fault simulation for mixed-signal systems. In Proceedings of the IEEE VLSI Test Symposium (pp. 149-154). IEEE.