TY - GEN
T1 - TDDB in HfSiON/SiO2 dielectric stack
T2 - 2017 International Reliability Physics Symposium, IRPS 2017
AU - Reza, Ahmed Kamal
AU - Hassan, Mohammad Khaled
AU - Roy, Kaushik
AU - Patra, Devyani
AU - Bansal, Ankita
AU - Cao, Yu
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/5/30
Y1 - 2017/5/30
N2 - HfO2 based high-κ metal gate (HKMG) transistors offer low leakage current and high integration density. However, they are vulnerable to defect formation. In this paper, we have demonstrated a Büttiker probe based leakage current model [1][2] for determining the gate leakage current in a HKMG transistor due to defects in the gate dielectric layer. These defects can be pre-existing defects (PEDs) as well as the stress induced defects in the gate dielectric stack. The model was also used to determine the post breakdown gate current characteristics. We have verified our model with experimentally measured data from 28nm planar devices with HfSiON/SiO2 gate dielectric layer. In addition, we have integrated the Büttiker probe method and percolation model [3] to predict the time to failure (tBD) of the device. The proposed simulation methodology can also be used to determine the required stress condition (SC) to observe breakdown in a device within a certain period of time.
AB - HfO2 based high-κ metal gate (HKMG) transistors offer low leakage current and high integration density. However, they are vulnerable to defect formation. In this paper, we have demonstrated a Büttiker probe based leakage current model [1][2] for determining the gate leakage current in a HKMG transistor due to defects in the gate dielectric layer. These defects can be pre-existing defects (PEDs) as well as the stress induced defects in the gate dielectric stack. The model was also used to determine the post breakdown gate current characteristics. We have verified our model with experimentally measured data from 28nm planar devices with HfSiON/SiO2 gate dielectric layer. In addition, we have integrated the Büttiker probe method and percolation model [3] to predict the time to failure (tBD) of the device. The proposed simulation methodology can also be used to determine the required stress condition (SC) to observe breakdown in a device within a certain period of time.
KW - Breakdown Prediction
KW - Büttiker probe
KW - HfSiON
KW - Non-equilibrium Green's function (NEGF)
KW - Stress Induced Leakage Current (SILC)
KW - Temperature Stress
KW - Time dependent Dielectric Breakdown (TDDB)
KW - Voltage Stress
KW - Weibull
KW - high-κ metal gate (HKMG)
UR - http://www.scopus.com/inward/record.url?scp=85024362246&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85024362246&partnerID=8YFLogxK
U2 - 10.1109/IRPS.2017.7936362
DO - 10.1109/IRPS.2017.7936362
M3 - Conference contribution
AN - SCOPUS:85024362246
T3 - IEEE International Reliability Physics Symposium Proceedings
SP - DG5.1-DG5.6
BT - 2017 International Reliability Physics Symposium, IRPS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 2 April 2017 through 6 April 2017
ER -