System interconnect design exploration for embedded MPSoCs

Chen Ling Chou, Radu Marculescu, Umit Ogras, Satrajit Chatterjee, Michael Kishinevsky, Dmitrii Loukianov

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

This paper presents a new approach for system interconnect design exploration of application-specific multi-processor systems-on-chip (MPSoCs). As a novel contribution, we develop an analytical model for network-based communication design space exploration and generate fabric solutions with optimal cost-performance trade-offs, while considering various design constrains, such as power, area, and wirelength. For large systems, we also propose an efficient approach for obtaining competitive solutions with significant less computation time compared to the exhaustive approach. The accuracy of our analytical model is validated via SystemC simulation using several synthetic applications and an industrial SoC design.

Original languageEnglish (US)
Title of host publication2011 13th International Workshop on System Level Interconnect Prediction, SLIP 2011
DOIs
StatePublished - Dec 1 2011
Externally publishedYes
Event2011 13th International Workshop on System Level Interconnect Prediction, SLIP 2011 - San Diego, CA, United States
Duration: Jun 5 2011Jun 5 2011

Publication series

NameInternational Workshop on System Level Interconnect Prediction, SLIP

Other

Other2011 13th International Workshop on System Level Interconnect Prediction, SLIP 2011
CountryUnited States
CitySan Diego, CA
Period6/5/116/5/11

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Applied Mathematics

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  • Cite this

    Chou, C. L., Marculescu, R., Ogras, U., Chatterjee, S., Kishinevsky, M., & Loukianov, D. (2011). System interconnect design exploration for embedded MPSoCs. In 2011 13th International Workshop on System Level Interconnect Prediction, SLIP 2011 [6135433] (International Workshop on System Level Interconnect Prediction, SLIP). https://doi.org/10.1109/SLIP.2011.6135433