Survey of architectures for the discrete and continuous wavelet transforms

Chaitali Chakrabarti; Mohan Vishwanath; Robert M. Owens

Survey of architectures for the discrete and continuous wavelet transforms

Chaitali Chakrabarti, Mohan Vishwanath, Robert M. Owens

IAFSE-ECEE: Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Scopus citations

Abstract

Wavelet transforms have proven to be useful tools for several applications, including signal analysis, signal coding, and image compression. This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. The proposed architectures range from SIMD arrays to folded architectures such as systolic arrays and parallel filters. The SIMD arrays have a size that is proportional to that of the data sequence and are optimal with respect to time. The folded architectures, on the other hand, support single chip implementations and are optimal with respect to both area and time under the word-serial model.

Original language	English (US)
Title of host publication	ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
Pages	2849-2852
Number of pages	4
Volume	5
State	Published - 1995
Event	Proceedings of the 1995 20th International Conference on Acoustics, Speech, and Signal Processing. Part 2 (of 5) - Detroit, MI, USA Duration: May 9 1995 → May 12 1995

Other

Other	Proceedings of the 1995 20th International Conference on Acoustics, Speech, and Signal Processing. Part 2 (of 5)
City	Detroit, MI, USA
Period	5/9/95 → 5/12/95

ASJC Scopus subject areas

Electrical and Electronic Engineering
Signal Processing
Acoustics and Ultrasonics

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Chakrabarti, C, Vishwanath, M & Owens, RM 1995, Survey of architectures for the discrete and continuous wavelet transforms. in ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings. vol. 5, pp. 2849-2852, Proceedings of the 1995 20th International Conference on Acoustics, Speech, and Signal Processing. Part 2 (of 5), Detroit, MI, USA, 5/9/95.

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abstract = "Wavelet transforms have proven to be useful tools for several applications, including signal analysis, signal coding, and image compression. This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. The proposed architectures range from SIMD arrays to folded architectures such as systolic arrays and parallel filters. The SIMD arrays have a size that is proportional to that of the data sequence and are optimal with respect to time. The folded architectures, on the other hand, support single chip implementations and are optimal with respect to both area and time under the word-serial model.",

author = "Chaitali Chakrabarti and Mohan Vishwanath and Owens, {Robert M.}",

year = "1995",

language = "English (US)",

volume = "5",

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AU - Chakrabarti, Chaitali

AU - Vishwanath, Mohan

AU - Owens, Robert M.

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N2 - Wavelet transforms have proven to be useful tools for several applications, including signal analysis, signal coding, and image compression. This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. The proposed architectures range from SIMD arrays to folded architectures such as systolic arrays and parallel filters. The SIMD arrays have a size that is proportional to that of the data sequence and are optimal with respect to time. The folded architectures, on the other hand, support single chip implementations and are optimal with respect to both area and time under the word-serial model.

AB - Wavelet transforms have proven to be useful tools for several applications, including signal analysis, signal coding, and image compression. This paper surveys the VLSI architectures that have been proposed for computing the Discrete and Continuous Wavelet Transforms for 1-D and 2-D signals. The proposed architectures range from SIMD arrays to folded architectures such as systolic arrays and parallel filters. The SIMD arrays have a size that is proportional to that of the data sequence and are optimal with respect to time. The folded architectures, on the other hand, support single chip implementations and are optimal with respect to both area and time under the word-serial model.

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M3 - Conference contribution

AN - SCOPUS:0028996479

VL - 5

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EP - 2852

BT - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

T2 - Proceedings of the 1995 20th International Conference on Acoustics, Speech, and Signal Processing. Part 2 (of 5)

Y2 - 9 May 1995 through 12 May 1995

ER -

Survey of architectures for the discrete and continuous wavelet transforms

Abstract

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ASJC Scopus subject areas

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