Abstract

Characterization and modeling of bias temperature instability (BTI) is conventionally based on time-dependent shifts in threshold voltage (Vth) resulting from stress and relaxation conditions. Contributions of oxide near-interfacial (i.e., border) and interface traps are not independently captured in these conventional methods. By considering the effects of charge trapping dynamics on MOSFET operation, we present new techniques for characterizing and modeling the contributions of oxide and interface traps. Characterization is based on the rapid response of interface traps to high-frequency measurements of inverse subthreshold slope (S), for which slower oxide traps do not contribute, as their occupancy does not change at high frequencies. The modeling approach uses calculations of surface potential (ψs) to describe the distinct contributions of oxide and interface traps on BTI. Combined with capture/emission time maps, this approach describes BTI-induced ΔS, and Δ Vth stress/recovery characteristics.

Original languageEnglish (US)
Title of host publication2016 International Reliability Physics Symposium, IRPS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesXT061-XT066
Volume2016-September
ISBN (Electronic)9781467391368
DOIs
StatePublished - Sep 22 2016
Event2016 International Reliability Physics Symposium, IRPS 2016 - Pasadena, United States
Duration: Apr 17 2016Apr 21 2016

Other

Other2016 International Reliability Physics Symposium, IRPS 2016
CountryUnited States
CityPasadena
Period4/17/164/21/16

Keywords

  • Aging effects
  • bias temperature instability (BTI)
  • modeling
  • MOSFET
  • surface potential

ASJC Scopus subject areas

  • Engineering(all)

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    Esqueda, I. S., & Barnaby, H. (2016). Surface-potential-based compact modeling of BTI. In 2016 International Reliability Physics Symposium, IRPS 2016 (Vol. 2016-September, pp. XT061-XT066). [7574648] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2016.7574648