Abstract
A fabrication process for MESFETs with sub-100-nm recessed gates is discussed. This process incorporates ultra-high-resolution electron beam lithography for the gate definition and molecular beam epitaxy for wafer growth. Extensive DC electrical characteristics are presented for two MESFET structures: one with a lightly doped, thick channel and the other with a thin, heavily doped channel. The advantages of a superconducting gate electrode for sub-100-nm-gate-length MESFETs are discussed.
Original language | English (US) |
---|---|
Title of host publication | Unknown Host Publication Title |
Place of Publication | New York, NY, USA |
Publisher | IEEE |
Pages | 190-198 |
Number of pages | 9 |
State | Published - 1987 |
Externally published | Yes |
ASJC Scopus subject areas
- General Engineering