TY - GEN
T1 - Statistical analysis of random telegraph noise in digital circuits
AU - Chen, Xiaoming
AU - Wang, Yu
AU - Cao, Yu
AU - Yang, Huazhong
PY - 2014
Y1 - 2014
N2 - Random telegraph noise (RTN) has become an important reliability issue at the sub-65nm technology node. Existing RTN simulation approaches mainly focus on single trap induced RTN and transient response of RTN, which are usually time-consuming for circuit-level simulation. This paper proposes a statistical algorithm to study multiple traps induced RTN in digital circuits, to show the temporal distribution of circuit delay under RTN. Based on the simulation results we show how to protect circuit from RTN. Bias dependence of RTN is also discussed.
AB - Random telegraph noise (RTN) has become an important reliability issue at the sub-65nm technology node. Existing RTN simulation approaches mainly focus on single trap induced RTN and transient response of RTN, which are usually time-consuming for circuit-level simulation. This paper proposes a statistical algorithm to study multiple traps induced RTN in digital circuits, to show the temporal distribution of circuit delay under RTN. Based on the simulation results we show how to protect circuit from RTN. Bias dependence of RTN is also discussed.
KW - Random telegraph noise
KW - Reliability
KW - Statistical analysis
UR - http://www.scopus.com/inward/record.url?scp=84897865244&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84897865244&partnerID=8YFLogxK
U2 - 10.1109/ASPDAC.2014.6742883
DO - 10.1109/ASPDAC.2014.6742883
M3 - Conference contribution
AN - SCOPUS:84897865244
SN - 9781479928163
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 161
EP - 166
BT - 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings
T2 - 2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014
Y2 - 20 January 2014 through 23 January 2014
ER -