Static task-scheduling algorithms for battery-powered DVS systems

Princey Chowdhury, Chaitali Chakrabarti

Research output: Contribution to journalArticle

73 Citations (Scopus)

Abstract

Battery lifetime enhancement is a critical design parameter for mobile computing devices. Maximizing the battery lifetime is a particularly difficult problem due to the nonlinearity of the battery behavior and its dependence on the characteristics of the discharge profile. In this paper, we address the problem of task scheduling with voltage scaling in a battery-powered single and multiprocessor system such that the residual charge or the battery voltage (the parameters for evaluating battery performance) is maximized. We propose an efficient heuristic algorithm using a charge-based cost function derived from the analytical battery model. Our algorithm first creates a task sequence that ensures battery survival, and then distributes the available delay slack so that the cost function is maximized. The effectiveness of the algorithm has been verified using DUALFOIL, a low-level Li-ion battery simulator. The algorithm has been validated on synthetic examples created from applications running on Compaq's handheld computing research platform, ITSY.

Original languageEnglish (US)
Pages (from-to)226-237
Number of pages12
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume13
Issue number2
DOIs
StatePublished - Feb 2005

Fingerprint

Scheduling algorithms
Cost functions
Mobile computing
Heuristic algorithms
Simulators
Scheduling
Electric potential

Keywords

  • Battery optimizations
  • DVS processors
  • Low power
  • Scheduling
  • Voltage scaling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Static task-scheduling algorithms for battery-powered DVS systems. / Chowdhury, Princey; Chakrabarti, Chaitali.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 13, No. 2, 02.2005, p. 226-237.

Research output: Contribution to journalArticle

@article{9765eb950a414886ab72798893f56591,
title = "Static task-scheduling algorithms for battery-powered DVS systems",
abstract = "Battery lifetime enhancement is a critical design parameter for mobile computing devices. Maximizing the battery lifetime is a particularly difficult problem due to the nonlinearity of the battery behavior and its dependence on the characteristics of the discharge profile. In this paper, we address the problem of task scheduling with voltage scaling in a battery-powered single and multiprocessor system such that the residual charge or the battery voltage (the parameters for evaluating battery performance) is maximized. We propose an efficient heuristic algorithm using a charge-based cost function derived from the analytical battery model. Our algorithm first creates a task sequence that ensures battery survival, and then distributes the available delay slack so that the cost function is maximized. The effectiveness of the algorithm has been verified using DUALFOIL, a low-level Li-ion battery simulator. The algorithm has been validated on synthetic examples created from applications running on Compaq's handheld computing research platform, ITSY.",
keywords = "Battery optimizations, DVS processors, Low power, Scheduling, Voltage scaling",
author = "Princey Chowdhury and Chaitali Chakrabarti",
year = "2005",
month = "2",
doi = "10.1109/TVLSI.2004.840771",
language = "English (US)",
volume = "13",
pages = "226--237",
journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
issn = "1063-8210",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

TY - JOUR

T1 - Static task-scheduling algorithms for battery-powered DVS systems

AU - Chowdhury, Princey

AU - Chakrabarti, Chaitali

PY - 2005/2

Y1 - 2005/2

N2 - Battery lifetime enhancement is a critical design parameter for mobile computing devices. Maximizing the battery lifetime is a particularly difficult problem due to the nonlinearity of the battery behavior and its dependence on the characteristics of the discharge profile. In this paper, we address the problem of task scheduling with voltage scaling in a battery-powered single and multiprocessor system such that the residual charge or the battery voltage (the parameters for evaluating battery performance) is maximized. We propose an efficient heuristic algorithm using a charge-based cost function derived from the analytical battery model. Our algorithm first creates a task sequence that ensures battery survival, and then distributes the available delay slack so that the cost function is maximized. The effectiveness of the algorithm has been verified using DUALFOIL, a low-level Li-ion battery simulator. The algorithm has been validated on synthetic examples created from applications running on Compaq's handheld computing research platform, ITSY.

AB - Battery lifetime enhancement is a critical design parameter for mobile computing devices. Maximizing the battery lifetime is a particularly difficult problem due to the nonlinearity of the battery behavior and its dependence on the characteristics of the discharge profile. In this paper, we address the problem of task scheduling with voltage scaling in a battery-powered single and multiprocessor system such that the residual charge or the battery voltage (the parameters for evaluating battery performance) is maximized. We propose an efficient heuristic algorithm using a charge-based cost function derived from the analytical battery model. Our algorithm first creates a task sequence that ensures battery survival, and then distributes the available delay slack so that the cost function is maximized. The effectiveness of the algorithm has been verified using DUALFOIL, a low-level Li-ion battery simulator. The algorithm has been validated on synthetic examples created from applications running on Compaq's handheld computing research platform, ITSY.

KW - Battery optimizations

KW - DVS processors

KW - Low power

KW - Scheduling

KW - Voltage scaling

UR - http://www.scopus.com/inward/record.url?scp=13844297205&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=13844297205&partnerID=8YFLogxK

U2 - 10.1109/TVLSI.2004.840771

DO - 10.1109/TVLSI.2004.840771

M3 - Article

AN - SCOPUS:13844297205

VL - 13

SP - 226

EP - 237

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SN - 1063-8210

IS - 2

ER -