Standby supply voltage minimization for deep sub-micron SRAM

Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan Rabaey

Research output: Contribution to journalArticle

35 Citations (Scopus)

Abstract

Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (VDD) to its limit, which is the data retention voltage (DRV), leakage power can be substantially reduced. This paper models the DRV of a standard low leakage SRAM module as a function of process and design parameters, and analyzes the SRAM cell stability when VDD approaches DRV. The DRV model is verified using simulations as well as measurements from a 4 KB SRAM chip in a 0.13 μm technology. Due to a large on-chip variation, DRV of the 4 KB SRAM module ranges between 60 and 390 mV. Measurements taken at 100 mV above the worst-case DRV show that reducing the SRAM standby VDD to a safe level of 490 mV saves 85% leakage power. Further savings can be achieved by applying DRV-aware SRAM optimization techniques, which are discussed at the end of this paper.

Original languageEnglish (US)
Pages (from-to)789-800
Number of pages12
JournalMicroelectronics Journal
Volume36
Issue number9
DOIs
StatePublished - Sep 2005
Externally publishedYes

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Static random access storage
optimization
Electric potential
electric potential
leakage
modules
chips
Leakage currents
Data storage equipment
cells

Keywords

  • Data retention
  • DRV
  • Leakage suppression
  • SRAM
  • State preservation
  • Variation

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Cite this

Standby supply voltage minimization for deep sub-micron SRAM. / Qin, Huifang; Cao, Yu; Markovic, Dejan; Vladimirescu, Andrei; Rabaey, Jan.

In: Microelectronics Journal, Vol. 36, No. 9, 09.2005, p. 789-800.

Research output: Contribution to journalArticle

Qin, H, Cao, Y, Markovic, D, Vladimirescu, A & Rabaey, J 2005, 'Standby supply voltage minimization for deep sub-micron SRAM', Microelectronics Journal, vol. 36, no. 9, pp. 789-800. https://doi.org/10.1016/j.mejo.2005.03.003
Qin, Huifang ; Cao, Yu ; Markovic, Dejan ; Vladimirescu, Andrei ; Rabaey, Jan. / Standby supply voltage minimization for deep sub-micron SRAM. In: Microelectronics Journal. 2005 ; Vol. 36, No. 9. pp. 789-800.
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