Sphere decoding for multiprocessor architectures

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Motivated by the need for high throughput sphere decoding for multiple-input-multiple-output (MIMO) communication systems, we propose a parallel depth-first sphere decoding (PDSD) algorithm that provides the advantages of both parallel processing and rapid search space reduction. The PDSD algorithm is designed for efficient implementation on programmable multi-processor platforms. We investigate the trade-off between the throughput and computation over-head when the number of processing elements is 2,4 and 8, for a 4 × 4 16-QAM system across a wide range of SNR conditions. Through simulation, we show that PDSD can offer significant throughput improvement without incurring substantial computation overhead by selecting the appropriate number of processing elements according to specific SNR conditions.

Original languageEnglish (US)
Title of host publicationIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
Pages50-55
Number of pages6
DOIs
StatePublished - 2007
Event2007 IEEE Workshop on Signal Processing Systems, SiPS 2007 - Shanghai, China
Duration: Oct 17 2007Oct 19 2007

Other

Other2007 IEEE Workshop on Signal Processing Systems, SiPS 2007
CountryChina
CityShanghai
Period10/17/0710/19/07

Fingerprint

Decoding
Throughput
Processing
Quadrature amplitude modulation
Communication systems

Keywords

  • Architecture
  • Multiprocessor
  • Sphere decoding

ASJC Scopus subject areas

  • Media Technology
  • Signal Processing

Cite this

Qi, Q., & Chakrabarti, C. (2007). Sphere decoding for multiprocessor architectures. In IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation (pp. 50-55). [4387516] https://doi.org/10.1109/SIPS.2007.4387516

Sphere decoding for multiprocessor architectures. / Qi, Q.; Chakrabarti, Chaitali.

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. 2007. p. 50-55 4387516.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Qi, Q & Chakrabarti, C 2007, Sphere decoding for multiprocessor architectures. in IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation., 4387516, pp. 50-55, 2007 IEEE Workshop on Signal Processing Systems, SiPS 2007, Shanghai, China, 10/17/07. https://doi.org/10.1109/SIPS.2007.4387516
Qi Q, Chakrabarti C. Sphere decoding for multiprocessor architectures. In IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. 2007. p. 50-55. 4387516 https://doi.org/10.1109/SIPS.2007.4387516
Qi, Q. ; Chakrabarti, Chaitali. / Sphere decoding for multiprocessor architectures. IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation. 2007. pp. 50-55
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