Special session on BIST/calibration of A/MS devices

Hans Mart Von Staudt, James Izon, Sule Ozev, Peter Sarson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This special session will focus on new ways of performing calibration and test of on chip circuits that historically were performed on ATE. The presentation in this special session will demonstrate how these new test and calibration techniques help to reduce cost and increase the quality of semiconductor shipped into the field.

Original languageEnglish (US)
Title of host publicationProceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018
PublisherIEEE Computer Society
Number of pages1
Volume2018-April
ISBN (Electronic)9781538637746
DOIs
StatePublished - May 29 2018
Event36th IEEE VLSI Test Symposium, VTS 2018 - San Francisco, United States
Duration: Apr 22 2018Apr 25 2018

Other

Other36th IEEE VLSI Test Symposium, VTS 2018
CountryUnited States
CitySan Francisco
Period4/22/184/25/18

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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