Abstract
Wireless communication is one of the most computationally demanding workloads. It is performed by mobile terminals ("cell phones") and must be accomplished by a small battery powered system. An important goal of the wireless industry is to develop hardware platforms that can support multiple protocols implemented in software (software defined radio) to support seamless end-user service over a variety of wireless networks. An equally important goal is to provide higher and higher data rates. This paper focuses on a study of the wideband code division multiple access protocol, which is one of the dominant third generation wireless standards. We have chosen it as a representative protocol. We provide a detailed analysis of computation and processing requirements of the core algorithms along with the interactions between the components. The goal of this paper is to describe the computational characteristics of this protocol to the computer architecture community, and to provide a high-level analysis of the architectural implications to illustrate one of the protocols that would need to be accommodated in a programmable platform for software denned radio. The computation demands and power limitations of approximately 60 Gops and 100-300 mW, place extremely challenging goals on such a system. Several of the key features of wideband code division multiple access protocol that can be exploited in the architecture include high degrees of vector and task parallelism, small memory footprints for both data and instructions, limited need for complex arithmetic functions such as multiplication, and a highly variable processing load that provides the opportunity to dynamically scale voltage and frequency.
| Original language | English (US) |
|---|---|
| Title of host publication | High Performance Embedded Architectures and Compilers - First International Conference, HiPEAC 2005, Proceedings |
| Pages | 6-26 |
| Number of pages | 21 |
| State | Published - Dec 1 2005 |
| Externally published | Yes |
| Event | 1st International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2005 - Barcelona, Spain Duration: Nov 17 2005 → Nov 18 2005 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 3793 LNCS |
| ISSN (Print) | 0302-9743 |
| ISSN (Electronic) | 1611-3349 |
Other
| Other | 1st International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2005 |
|---|---|
| Country | Spain |
| City | Barcelona |
| Period | 11/17/05 → 11/18/05 |
Fingerprint
ASJC Scopus subject areas
- Theoretical Computer Science
- Computer Science(all)
Cite this
Software defined radio - A high performance embedded challenge. / LEE, Hyunseok; Lin, Yuan; Harel, Yoav; Woh, Mark; Mahlke, Scott; Mudge, Trevor; Flautner, Krisztian.
High Performance Embedded Architectures and Compilers - First International Conference, HiPEAC 2005, Proceedings. 2005. p. 6-26 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 3793 LNCS).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Software defined radio - A high performance embedded challenge
AU - LEE, Hyunseok
AU - Lin, Yuan
AU - Harel, Yoav
AU - Woh, Mark
AU - Mahlke, Scott
AU - Mudge, Trevor
AU - Flautner, Krisztian
PY - 2005/12/1
Y1 - 2005/12/1
N2 - Wireless communication is one of the most computationally demanding workloads. It is performed by mobile terminals ("cell phones") and must be accomplished by a small battery powered system. An important goal of the wireless industry is to develop hardware platforms that can support multiple protocols implemented in software (software defined radio) to support seamless end-user service over a variety of wireless networks. An equally important goal is to provide higher and higher data rates. This paper focuses on a study of the wideband code division multiple access protocol, which is one of the dominant third generation wireless standards. We have chosen it as a representative protocol. We provide a detailed analysis of computation and processing requirements of the core algorithms along with the interactions between the components. The goal of this paper is to describe the computational characteristics of this protocol to the computer architecture community, and to provide a high-level analysis of the architectural implications to illustrate one of the protocols that would need to be accommodated in a programmable platform for software denned radio. The computation demands and power limitations of approximately 60 Gops and 100-300 mW, place extremely challenging goals on such a system. Several of the key features of wideband code division multiple access protocol that can be exploited in the architecture include high degrees of vector and task parallelism, small memory footprints for both data and instructions, limited need for complex arithmetic functions such as multiplication, and a highly variable processing load that provides the opportunity to dynamically scale voltage and frequency.
AB - Wireless communication is one of the most computationally demanding workloads. It is performed by mobile terminals ("cell phones") and must be accomplished by a small battery powered system. An important goal of the wireless industry is to develop hardware platforms that can support multiple protocols implemented in software (software defined radio) to support seamless end-user service over a variety of wireless networks. An equally important goal is to provide higher and higher data rates. This paper focuses on a study of the wideband code division multiple access protocol, which is one of the dominant third generation wireless standards. We have chosen it as a representative protocol. We provide a detailed analysis of computation and processing requirements of the core algorithms along with the interactions between the components. The goal of this paper is to describe the computational characteristics of this protocol to the computer architecture community, and to provide a high-level analysis of the architectural implications to illustrate one of the protocols that would need to be accommodated in a programmable platform for software denned radio. The computation demands and power limitations of approximately 60 Gops and 100-300 mW, place extremely challenging goals on such a system. Several of the key features of wideband code division multiple access protocol that can be exploited in the architecture include high degrees of vector and task parallelism, small memory footprints for both data and instructions, limited need for complex arithmetic functions such as multiplication, and a highly variable processing load that provides the opportunity to dynamically scale voltage and frequency.
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M3 - Conference contribution
AN - SCOPUS:33646826321
SN - 3540303170
SN - 9783540303176
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 6
EP - 26
BT - High Performance Embedded Architectures and Compilers - First International Conference, HiPEAC 2005, Proceedings
ER -