Six and seven transistor leakage suppressed SRAM cells with improved read stability

Sayeed A. Badrudduza; Lawrence T. Clark

doi:10.1109/CICC.2007.4405719

Six and seven transistor leakage suppressed SRAM cells with improved read stability

Sayeed A. Badrudduza, Lawrence T. Clark

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Static random access memories with six and seven transistor cells that maintain full static noise margin during read operation and reside in low leakage voltage collapsed state when unselected are presented. The memory test circuits are fabricated on a 0.13 μm CMOS process technology. The cells are 11% larger than a conventional SRAM cell drawn to the same design rules. Measured test results verify the power, speed, and usable range of power supply voltages for the designs.

Original language	English (US)
Title of host publication	Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	225-228
Number of pages	4
ISBN (Print)	1424407869, 9781424407866
DOIs	https://doi.org/10.1109/CICC.2007.4405719
State	Published - Jan 1 2007
Event	2007 IEEE Custom Integrated Circuits Conference, CICC - San Jose, CA, United States Duration: Sep 16 2007 → Sep 19 2007

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Conference

Conference	2007 IEEE Custom Integrated Circuits Conference, CICC
Country/Territory	United States
City	San Jose, CA
Period	9/16/07 → 9/19/07

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/CICC.2007.4405719

Cite this

Badrudduza, S. A., & Clark, L. T. (2007). Six and seven transistor leakage suppressed SRAM cells with improved read stability. In Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC (pp. 225-228). Article 4405719 (Proceedings of the Custom Integrated Circuits Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC.2007.4405719

Six and seven transistor leakage suppressed SRAM cells with improved read stability. / Badrudduza, Sayeed A.; Clark, Lawrence T.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC. Institute of Electrical and Electronics Engineers Inc., 2007. p. 225-228 4405719 (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Badrudduza, SA & Clark, LT 2007, Six and seven transistor leakage suppressed SRAM cells with improved read stability. in Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, CICC., 4405719, Proceedings of the Custom Integrated Circuits Conference, Institute of Electrical and Electronics Engineers Inc., pp. 225-228, 2007 IEEE Custom Integrated Circuits Conference, CICC, San Jose, CA, United States, 9/16/07. https://doi.org/10.1109/CICC.2007.4405719

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Six and seven transistor leakage suppressed SRAM cells with improved read stability

Abstract

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Conference

ASJC Scopus subject areas

Access to Document

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