Simulation and inverse modeling of TEOS deposition processes using a fast level set method

C. Heitzinger; J. Fugger; O. Häberlen; S. Selberherr

doi:10.1109/SISPAD.2002.1034549

Simulation and inverse modeling of TEOS deposition processes using a fast level set method

C. Heitzinger, J. Fugger, O. Häberlen, S. Selberherr

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

14 Scopus citations

Abstract

Deposition and etching of silicon trenches is an important manufacturing step for state of the art memory cells. Understanding and simulating the transport of gas species and surface evolution enables to achieve void-less filling of deep trenches, to predict the resulting profiles, and thus to optimize process parameters with respect to manufacturing throughput and the quality of the resulting memory cells. For the simulation of the SiO₂ deposition process from TEOS (Tetraethoxysilane), the level set method was used in addition to physical models. The level set algorithm devised minimizes computational effort while ensuring high accuracy by intertwining narrow banding and extending the speed function. In order to make the predictions of the simulation more accurate, model parameters were extracted by comparing the step coverages of the deposited layers in the simulation with those of SEM (scanning electron microscope) images.

Original language	English (US)
Title of host publication	2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	191-194
Number of pages	4
ISBN (Electronic)	4891140275
DOIs	https://doi.org/10.1109/SISPAD.2002.1034549
State	Published - 2002
Externally published	Yes
Event	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002 - Kobe, Japan Duration: Sep 4 2002 → Sep 6 2002

Publication series

Name	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume	2002-January

Other

Other	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002
Country/Territory	Japan
City	Kobe
Period	9/4/02 → 9/6/02

Keywords

Computational modeling
Etching
Filling
Inverse problems
Level set
Manufacturing processes
Predictive models
Scanning electron microscopy
Silicon
Virtual manufacturing

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Science Applications
Modeling and Simulation

Access to Document

10.1109/SISPAD.2002.1034549

Cite this

Heitzinger, C., Fugger, J., Häberlen, O., & Selberherr, S. (2002). Simulation and inverse modeling of TEOS deposition processes using a fast level set method. In 2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002 (pp. 191-194). Article 1034549 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2002-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SISPAD.2002.1034549

Simulation and inverse modeling of TEOS deposition processes using a fast level set method. / Heitzinger, C.; Fugger, J.; Häberlen, O. et al.
2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002. Institute of Electrical and Electronics Engineers Inc., 2002. p. 191-194 1034549 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2002-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Heitzinger, C, Fugger, J, Häberlen, O & Selberherr, S 2002, Simulation and inverse modeling of TEOS deposition processes using a fast level set method. in 2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002., 1034549, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, vol. 2002-January, Institute of Electrical and Electronics Engineers Inc., pp. 191-194, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002, Kobe, Japan, 9/4/02. https://doi.org/10.1109/SISPAD.2002.1034549

Heitzinger C, Fugger J, Häberlen O, Selberherr S. Simulation and inverse modeling of TEOS deposition processes using a fast level set method. In 2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 191-194. 1034549. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). doi: 10.1109/SISPAD.2002.1034549

Heitzinger, C. ; Fugger, J. ; Häberlen, O. et al. / Simulation and inverse modeling of TEOS deposition processes using a fast level set method. 2002 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002. Institute of Electrical and Electronics Engineers Inc., 2002. pp. 191-194 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

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title = "Simulation and inverse modeling of TEOS deposition processes using a fast level set method",

abstract = "Deposition and etching of silicon trenches is an important manufacturing step for state of the art memory cells. Understanding and simulating the transport of gas species and surface evolution enables to achieve void-less filling of deep trenches, to predict the resulting profiles, and thus to optimize process parameters with respect to manufacturing throughput and the quality of the resulting memory cells. For the simulation of the SiO2 deposition process from TEOS (Tetraethoxysilane), the level set method was used in addition to physical models. The level set algorithm devised minimizes computational effort while ensuring high accuracy by intertwining narrow banding and extending the speed function. In order to make the predictions of the simulation more accurate, model parameters were extracted by comparing the step coverages of the deposited layers in the simulation with those of SEM (scanning electron microscope) images.",

keywords = "Computational modeling, Etching, Filling, Inverse problems, Level set, Manufacturing processes, Predictive models, Scanning electron microscopy, Silicon, Virtual manufacturing",

author = "C. Heitzinger and J. Fugger and O. H{\"a}berlen and S. Selberherr",

note = "Publisher Copyright: {\textcopyright} 2002 Japan Soc. of Applied Physics.; International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2002 ; Conference date: 04-09-2002 Through 06-09-2002",

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AB - Deposition and etching of silicon trenches is an important manufacturing step for state of the art memory cells. Understanding and simulating the transport of gas species and surface evolution enables to achieve void-less filling of deep trenches, to predict the resulting profiles, and thus to optimize process parameters with respect to manufacturing throughput and the quality of the resulting memory cells. For the simulation of the SiO2 deposition process from TEOS (Tetraethoxysilane), the level set method was used in addition to physical models. The level set algorithm devised minimizes computational effort while ensuring high accuracy by intertwining narrow banding and extending the speed function. In order to make the predictions of the simulation more accurate, model parameters were extracted by comparing the step coverages of the deposited layers in the simulation with those of SEM (scanning electron microscope) images.

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Simulation and inverse modeling of TEOS deposition processes using a fast level set method

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Keywords

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