State of the art 2D and 3D electro-thermal particle-based device simulators have been developed to investigate degradation in the on-current due to self-heating effects in fully-depleted SOI devices and nanowire transistors. For the fully-depleted SOI devices in which we have thin silicon slabs temperature and thickness dependent expression for the thermal conductivity data that agrees perfectly with Asheghi and co-workers experimental data is derived and implemented in the code. Regarding the thermal conductivity of the nanowire transistor, the experimental data of Li Shi and co-workers are used. We find that velocity saturation effect in both fully-depleted SOI and nanowire transistors is the main reason for the observation of smaller degradation due to selfheating effects. For the case of FD SOI devices, we find that crystallographic orientation plays role on the amount of current degradation. For the case of the nanowire transistors, we find that placement of contacts significantly affects the current degradation.