Abstract
To understand the impact of self-heating in SOI CMOS technologies we have fabricated pairs of 40nm gate length n-channel MOSFETs that share a common source contact and the same active silicon region. One of the MOSFETs is turned on and heats the active silicon, while the other is biased into the subthreshold regime and operates as a local thermometer. Preliminary results show that the MOSFET thermometer temperature increases approximately quadratically with the power dissipated in the MOSFET heater.
| Original language | English (US) |
|---|---|
| Title of host publication | 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781538610169 |
| DOIs | |
| State | Published - Jan 8 2019 |
| Event | 13th IEEE Nanotechnology Materials and Devices Conference, NMDC 2018 - Portland, United States Duration: Oct 14 2018 → Oct 17 2018 |
Publication series
| Name | 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018 |
|---|
Conference
| Conference | 13th IEEE Nanotechnology Materials and Devices Conference, NMDC 2018 |
|---|---|
| Country | United States |
| City | Portland |
| Period | 10/14/18 → 10/17/18 |
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Keywords
- CMOS
- RFIC
- self-heating effects
- silicon-on-insulator
- sub-threshold operation
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
- Surfaces, Coatings and Films
- Instrumentation
Cite this
Self-heating in SOI MOSFETs at the 45nm node. / Zhang, Xiong; Mehr, Payam; Vasileska, Dragica; Thornton, Trevor.
2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018. Institute of Electrical and Electronics Engineers Inc., 2019. 8605870 (2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Self-heating in SOI MOSFETs at the 45nm node
AU - Zhang, Xiong
AU - Mehr, Payam
AU - Vasileska, Dragica
AU - Thornton, Trevor
PY - 2019/1/8
Y1 - 2019/1/8
N2 - To understand the impact of self-heating in SOI CMOS technologies we have fabricated pairs of 40nm gate length n-channel MOSFETs that share a common source contact and the same active silicon region. One of the MOSFETs is turned on and heats the active silicon, while the other is biased into the subthreshold regime and operates as a local thermometer. Preliminary results show that the MOSFET thermometer temperature increases approximately quadratically with the power dissipated in the MOSFET heater.
AB - To understand the impact of self-heating in SOI CMOS technologies we have fabricated pairs of 40nm gate length n-channel MOSFETs that share a common source contact and the same active silicon region. One of the MOSFETs is turned on and heats the active silicon, while the other is biased into the subthreshold regime and operates as a local thermometer. Preliminary results show that the MOSFET thermometer temperature increases approximately quadratically with the power dissipated in the MOSFET heater.
KW - CMOS
KW - RFIC
KW - self-heating effects
KW - silicon-on-insulator
KW - sub-threshold operation
UR - http://www.scopus.com/inward/record.url?scp=85061798158&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85061798158&partnerID=8YFLogxK
U2 - 10.1109/NMDC.2018.8605870
DO - 10.1109/NMDC.2018.8605870
M3 - Conference contribution
T3 - 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018
BT - 2018 IEEE 13th Nanotechnology Materials and Devices Conference, NMDC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
ER -