Selectively Doped Heterostructure Frequency Dividers

R. A. Kiehl, M. D. Feuer, R. H. Hendel, V. G. Keramidas, C. L. Allyn, R. Dingle, J. C.M. Hwang

Research output: Contribution to journalArticle

18 Scopus citations

Abstract

The operation of high-speed divide-by-two circuit (binary counter) composed of selectively doped heterostructure logic gates is reported for the first time. These field-effect transistor circuits utilize the enhanced transport properties of high-mobility electrons confined near a heterojunction interface in a selectively doped AlGaAs/GaAs structure. The dividers are based on a Type-D flip-flop composed of six direct-coupled NOR-gates having l-μm gate lengths and 4-μm source-drain spacings. They are fabricated by conventional optical contact lithography on a four-layer Al.3Ga.7As/GaAs structure grown by molecular-beam epitaxy. Successful operation is demonstrated at 5.9 GHz at 77 K for 1.3-V bias and 30-mW total power dissipation (including output buffers) and 3.7 GHz at 300 K for 1.4-V bias and 19-mW total power dissipation. Total power dissipation values as low as 3.9 mW at 0.65-V bias were also obtained for 2.85-GHz operation at 300 K. These preliminary results illustrate the promise of SDHT logic for ultrahigh-speed low-power applications.

Original languageEnglish (US)
Pages (from-to)377-379
Number of pages3
JournalIEEE Electron Device Letters
Volume4
Issue number10
DOIs
StatePublished - Jan 1 1983
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Kiehl, R. A., Feuer, M. D., Hendel, R. H., Keramidas, V. G., Allyn, C. L., Dingle, R., & Hwang, J. C. M. (1983). Selectively Doped Heterostructure Frequency Dividers. IEEE Electron Device Letters, 4(10), 377-379. https://doi.org/10.1109/EDL.1983.25770