SAGA: Synthesis technique for guaranteed throughput NoC architectures

Krishnan Srinivasan, Karam S. Chatha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

We present SAGA, a novel genetic algorithm (GA) based technique for synthesis of custom NoC architectures that support guaranteed throughput traffic. The technique accepts as input a communication trace graph, amount of data, period, and deadline for each trace, interconnection network architecture elements, and generates a custom NoC topology, and routing and schedule of the communication traces on the architecture. SAGA minimizes both the energy consumption and area of the design by solving a multi-objective optimization problem. We present a detailed analysis of the quality of the results and the solution times of the proposed technique by extensive experimentation with realistic benchmarks and comparisons with optimal MILP solutions. SAGA is able to generate solutions that are as good as the optimal solutions produced by the MILP formulation. Whereas the MILP formulation run time rises exponentially for even moderately sized graphs, SAGA generates solutions for large graphs in reasonable time.

Original languageEnglish (US)
Title of host publicationProceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
Pages489-494
Number of pages6
StatePublished - Dec 1 2005
Event2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 - Shanghai, China
Duration: Jan 18 2005Jan 21 2005

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume1

Other

Other2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005
CountryChina
CityShanghai
Period1/18/051/21/05

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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  • Cite this

    Srinivasan, K., & Chatha, K. S. (2005). SAGA: Synthesis technique for guaranteed throughput NoC architectures. In Proceedings of the 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005 (pp. 489-494). [1466212] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 1).