Reverse-body bias and supply collapse for low effective standby power

Lawrence T. Clark, Michael Morrow, William Brown

Research output: Contribution to journalArticle

39 Scopus citations

Abstract

Integrated circuits fabricated on a low-leakage process typically display lower performance due to the high threshold voltage (Vt) transistors. Higher performance microprocessors sacrifice power efficiency by decreasing Vt. We show that a processor built on a low Vt process can achieve the power-per-computation characteristics of one built using a high Vt process, by using a "drowsy" mode combining reverse body bias (RBB) and voltage collapse when idle. This approach also allows for higher peak performance, if needed. A simple power model is shown to accurately match the measured data; high-operational frequency is demonstrated when in active operation. The circuit techniques used to provide the RBB mode of operation are described and compared with other techniques such as multi-threshold CMOS. While both techniques can be effective for logic, the design effort for RBB is shown to be smaller, while reducing embedded static random access memory standby power without added size.

Original languageEnglish (US)
Pages (from-to)947-956
Number of pages10
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume12
Issue number9
DOIs
StatePublished - Sep 1 2004

Keywords

  • Microprocessor
  • Power modeling
  • Reverse-body bias (RBB)
  • Transistor leakage

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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