TY - GEN
T1 - Redundant skewed clocking of pulse-clocked latches for low power soft error mitigation
AU - Gujja, Aditya
AU - Chellappa, Srivatsan
AU - Ramamurthy, Chandarasekaran
AU - Clark, Lawrence T.
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/12/24
Y1 - 2015/12/24
N2 - An integrated methodology combining redundant clock tree synthesis and pulse clocked latches mitigates both SEU and SET with reduced power consumption. The approach utilizes commercial CAD tools. An advanced encryption system is implemented with the proposed design is compared to a previous design with non-redundant clock trees and local delay generation. The proposed approach reduces energy per operation by 18% over an improved version of the prior approach, with negligible area impact.
AB - An integrated methodology combining redundant clock tree synthesis and pulse clocked latches mitigates both SEU and SET with reduced power consumption. The approach utilizes commercial CAD tools. An advanced encryption system is implemented with the proposed design is compared to a previous design with non-redundant clock trees and local delay generation. The proposed approach reduces energy per operation by 18% over an improved version of the prior approach, with negligible area impact.
KW - Flip-Flop
KW - Multiple node charge collection
KW - Single event transient
KW - Single event upset
KW - Temporal hardening
KW - Triple mode redundancy
UR - http://www.scopus.com/inward/record.url?scp=84973369729&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84973369729&partnerID=8YFLogxK
U2 - 10.1109/RADECS.2015.7365658
DO - 10.1109/RADECS.2015.7365658
M3 - Conference contribution
AN - SCOPUS:84973369729
T3 - Proceedings of the European Conference on Radiation and its Effects on Components and Systems, RADECS
BT - 2015 15th European Conference on Radiation and Its Effects on Components and Systems, RADECS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 15th European Conference on Radiation and Its Effects on Components and Systems, RADECS 2015
Y2 - 14 September 2015 through 18 September 2015
ER -