Reconfigurable embedded media processors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The rapid proliferation of embedded multimedia applications necessitates efficient implementations which satisfy the computing demands of the various media processing algorithms. Several hardware and software solutions for media processing have appeared in the recent literature. The complexity, variety of techniques and tools associated with multimedia processing points to the opportunities for reconfigurable computing devices. These devices will be able to adapt the underlying hardware dynamically in response to changes in the input data or processing environment. In order to understand the static and dynamic nature of media processing techniques, there is a need to first perform a detailed complexity analysis on the set of candidate algorithms that encompass multimedia processing. This in turn will facilitate the design of a reconfigurable embedded hardware system. In this paper, we present a summary of the various implementation alternatives for media processing followed by the proposed approach for designing reconfigurable processors. We have chosen the latest multimedia standard namely, MPEG 4 as an example to demonstrate the potential for reconfigurability.

Original languageEnglish (US)
Title of host publicationIEEE International Performance, Computing and Communications Conference, Proceedings
Pages293-298
Number of pages6
StatePublished - 2001
Event20th IEEE International Performance, Computing, and Communications Conference - Phoenix, AZ, United States
Duration: Apr 4 2001Apr 6 2001

Other

Other20th IEEE International Performance, Computing, and Communications Conference
CountryUnited States
CityPhoenix, AZ
Period4/4/014/6/01

ASJC Scopus subject areas

  • Media Technology

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  • Cite this

    Panchanathan, S. (2001). Reconfigurable embedded media processors. In IEEE International Performance, Computing and Communications Conference, Proceedings (pp. 293-298)