RECOD

A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns

Karam S. Chatha, Ranga Vemuri

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

Hardware/Software designs of embedded systems are characterized by stringent performance constraints. Pipelined implementation of a design is an effective way for maximizing the performance of a design. In this paper we present a novel retiming heuristic to obtain pipelined schedules for hardware-software codesigns. The heuristic aims at maximizing the throughput of a loop oriented resource constrained codesign while minimizing its shared memory usage. The effectiveness of the proposed technique is demonstrated by experimentation.

Original languageEnglish (US)
Title of host publicationHardware/Software Codesign - Proceedings of the International Workshop
Editors Anon
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE Comp Soc
Pages139-143
Number of pages5
StatePublished - 1998
Externally publishedYes
EventProceedings of the 1998 6th International Workshop on Hardware/Software Codesign - Seattle, WA, USA
Duration: Mar 15 1998Mar 18 1998

Other

OtherProceedings of the 1998 6th International Workshop on Hardware/Software Codesign
CitySeattle, WA, USA
Period3/15/983/18/98

Fingerprint

Data storage equipment
Software design
Embedded systems
Computer hardware
Throughput
Hardware-software codesign

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

Chatha, K. S., & Vemuri, R. (1998). RECOD: A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. In Anon (Ed.), Hardware/Software Codesign - Proceedings of the International Workshop (pp. 139-143). Los Alamitos, CA, United States: IEEE Comp Soc.

RECOD : A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. / Chatha, Karam S.; Vemuri, Ranga.

Hardware/Software Codesign - Proceedings of the International Workshop. ed. / Anon. Los Alamitos, CA, United States : IEEE Comp Soc, 1998. p. 139-143.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Chatha, KS & Vemuri, R 1998, RECOD: A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. in Anon (ed.), Hardware/Software Codesign - Proceedings of the International Workshop. IEEE Comp Soc, Los Alamitos, CA, United States, pp. 139-143, Proceedings of the 1998 6th International Workshop on Hardware/Software Codesign, Seattle, WA, USA, 3/15/98.
Chatha KS, Vemuri R. RECOD: A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. In Anon, editor, Hardware/Software Codesign - Proceedings of the International Workshop. Los Alamitos, CA, United States: IEEE Comp Soc. 1998. p. 139-143
Chatha, Karam S. ; Vemuri, Ranga. / RECOD : A retiming heuristic to optimize resource and memory utilization in HW/SW codesigns. Hardware/Software Codesign - Proceedings of the International Workshop. editor / Anon. Los Alamitos, CA, United States : IEEE Comp Soc, 1998. pp. 139-143
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