Real-time VLSI architecture for video compression

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.

Original languageEnglish (US)
Title of host publicationCanadian Conference on Electrical and Computer Engineering
Pages128-131
Number of pages4
Volume1
DOIs
StatePublished - 1995
Externally publishedYes
EventProceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2) - Montreal, Can
Duration: Sep 5 1995Sep 8 1995

Other

OtherProceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2)
CityMontreal, Can
Period9/5/959/8/95

Fingerprint

Vector quantization
Image compression
Computer hardware description languages
Computational complexity

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Hardware and Architecture

Cite this

Fatemi, O., & Panchanathan, S. (1995). Real-time VLSI architecture for video compression. In Canadian Conference on Electrical and Computer Engineering (Vol. 1, pp. 128-131) https://doi.org/10.1109/CCECE.1995.528091

Real-time VLSI architecture for video compression. / Fatemi, O.; Panchanathan, Sethuraman.

Canadian Conference on Electrical and Computer Engineering. Vol. 1 1995. p. 128-131.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Fatemi, O & Panchanathan, S 1995, Real-time VLSI architecture for video compression. in Canadian Conference on Electrical and Computer Engineering. vol. 1, pp. 128-131, Proceedings of the 1995 Canadian Conference on Electrical and Computer Engineering. Part 1 (of 2), Montreal, Can, 9/5/95. https://doi.org/10.1109/CCECE.1995.528091
Fatemi O, Panchanathan S. Real-time VLSI architecture for video compression. In Canadian Conference on Electrical and Computer Engineering. Vol. 1. 1995. p. 128-131 https://doi.org/10.1109/CCECE.1995.528091
Fatemi, O. ; Panchanathan, Sethuraman. / Real-time VLSI architecture for video compression. Canadian Conference on Electrical and Computer Engineering. Vol. 1 1995. pp. 128-131
@inproceedings{ebb6796c0f324b0f959f3d039b001a6d,
title = "Real-time VLSI architecture for video compression",
abstract = "Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.",
author = "O. Fatemi and Sethuraman Panchanathan",
year = "1995",
doi = "10.1109/CCECE.1995.528091",
language = "English (US)",
isbn = "0780327667",
volume = "1",
pages = "128--131",
booktitle = "Canadian Conference on Electrical and Computer Engineering",

}

TY - GEN

T1 - Real-time VLSI architecture for video compression

AU - Fatemi, O.

AU - Panchanathan, Sethuraman

PY - 1995

Y1 - 1995

N2 - Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.

AB - Video compression is becoming increasingly important in several applications. Vector quantization (VQ) is a powerful technique for very low bit rate image/video compression and is an attractive technique for mobile multimedia applications. Adaptive VQ techniques provide an excellent coding performance at the expense of significant increases in computational complexity making real-time implementation difficult. In this paper, we propose a VLSI chip-set design to implement a high performance cache based (adaptive) VQ (CVQ) technique using VHDL for real-time video compression.

UR - http://www.scopus.com/inward/record.url?scp=0029483787&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0029483787&partnerID=8YFLogxK

U2 - 10.1109/CCECE.1995.528091

DO - 10.1109/CCECE.1995.528091

M3 - Conference contribution

AN - SCOPUS:0029483787

SN - 0780327667

VL - 1

SP - 128

EP - 131

BT - Canadian Conference on Electrical and Computer Engineering

ER -