Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays

Shimeng Yu, Jiale Liang, Yi Wu, H. S. Philip Wong

Research output: Contribution to journalArticle

49 Citations (Scopus)

Abstract

Recently a prototype of complementary resistive switches has been proposed to solve the sneak-path problem in passive crossbar memory arrays. To further evaluate the potential of this novel cell structure for practical applications, we present a modeling analysis to capture its switching dynamics and analyze its unique read/write schemes. The model is corroborated by experimental data. We found a trade-off between the read voltage window and write voltage window. The constraint from avoiding disturbance on unselected cells is critical for proper functionality, which in turn limits the writing speed.

Original languageEnglish (US)
Article number465202
JournalNanotechnology
Volume21
Issue number46
DOIs
StatePublished - Nov 19 2010
Externally publishedYes

Fingerprint

Switches
Data storage equipment
Electric potential

ASJC Scopus subject areas

  • Bioengineering
  • Chemistry(all)
  • Electrical and Electronic Engineering
  • Mechanical Engineering
  • Mechanics of Materials
  • Materials Science(all)

Cite this

Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays. / Yu, Shimeng; Liang, Jiale; Wu, Yi; Philip Wong, H. S.

In: Nanotechnology, Vol. 21, No. 46, 465202, 19.11.2010.

Research output: Contribution to journalArticle

Yu, Shimeng ; Liang, Jiale ; Wu, Yi ; Philip Wong, H. S. / Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays. In: Nanotechnology. 2010 ; Vol. 21, No. 46.
@article{516f0cee0e12459295ea99dfa678b9fc,
title = "Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays",
abstract = "Recently a prototype of complementary resistive switches has been proposed to solve the sneak-path problem in passive crossbar memory arrays. To further evaluate the potential of this novel cell structure for practical applications, we present a modeling analysis to capture its switching dynamics and analyze its unique read/write schemes. The model is corroborated by experimental data. We found a trade-off between the read voltage window and write voltage window. The constraint from avoiding disturbance on unselected cells is critical for proper functionality, which in turn limits the writing speed.",
author = "Shimeng Yu and Jiale Liang and Yi Wu and {Philip Wong}, {H. S.}",
year = "2010",
month = "11",
day = "19",
doi = "10.1088/0957-4484/21/46/465202",
language = "English (US)",
volume = "21",
journal = "Nanotechnology",
issn = "0957-4484",
publisher = "IOP Publishing Ltd.",
number = "46",

}

TY - JOUR

T1 - Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays

AU - Yu, Shimeng

AU - Liang, Jiale

AU - Wu, Yi

AU - Philip Wong, H. S.

PY - 2010/11/19

Y1 - 2010/11/19

N2 - Recently a prototype of complementary resistive switches has been proposed to solve the sneak-path problem in passive crossbar memory arrays. To further evaluate the potential of this novel cell structure for practical applications, we present a modeling analysis to capture its switching dynamics and analyze its unique read/write schemes. The model is corroborated by experimental data. We found a trade-off between the read voltage window and write voltage window. The constraint from avoiding disturbance on unselected cells is critical for proper functionality, which in turn limits the writing speed.

AB - Recently a prototype of complementary resistive switches has been proposed to solve the sneak-path problem in passive crossbar memory arrays. To further evaluate the potential of this novel cell structure for practical applications, we present a modeling analysis to capture its switching dynamics and analyze its unique read/write schemes. The model is corroborated by experimental data. We found a trade-off between the read voltage window and write voltage window. The constraint from avoiding disturbance on unselected cells is critical for proper functionality, which in turn limits the writing speed.

UR - http://www.scopus.com/inward/record.url?scp=78650160992&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78650160992&partnerID=8YFLogxK

U2 - 10.1088/0957-4484/21/46/465202

DO - 10.1088/0957-4484/21/46/465202

M3 - Article

VL - 21

JO - Nanotechnology

JF - Nanotechnology

SN - 0957-4484

IS - 46

M1 - 465202

ER -