Abstract
The design cycle of the proposed asynchronous multiple functional units networks, from CAD tool coding to post-layout scalability, adheres to the attributes of rapid prototyping. These attributes come in five flavors: OOP style in CAD tools, short design, modify, evaluate and profile cycle at the dataflow graph level, reuse of predesigned components, effective event realization of the asynchronous behavior, and rapid VLSI realization. At the modeling level, a dataflow graph modeling tool specifies and profiles the asynchronous systems rapidly and accurately. At the architectural level, several multiple functional units networks illustrate two rarely addressed issues in asynchronous design: modularity and scalability, which are the keys to rapid prototyping. Networks in a distributor approach and a tournament protocol are presented, where fixed and greedy operand assignment are used respectively. The tournament protocol also leads to a short physical design time and a compact VLSI layout for its regular structure.
Original language | English (US) |
---|---|
Title of host publication | Proceedings of the International Workshop on Rapid System Prototyping |
Editors | Anon |
Publisher | IEEE |
Pages | 157-166 |
Number of pages | 10 |
State | Published - 1997 |
Externally published | Yes |
Event | Proceedings of the 1997 8th IEEE International Workshop on Rapid System Prototyping, RSP - Chapel Hill, NC, USA Duration: Jun 24 1997 → Jun 26 1997 |
Other
Other | Proceedings of the 1997 8th IEEE International Workshop on Rapid System Prototyping, RSP |
---|---|
City | Chapel Hill, NC, USA |
Period | 6/24/97 → 6/26/97 |
ASJC Scopus subject areas
- Software
- Safety, Risk, Reliability and Quality