The ability to carefully engineer ultra-shallow junctions close to the gate is critical for high performance advanced CMOS devices. Electron holography (EH) has been proposed and investigated as one of the promising techniques for mapping dopant profiles at a nanometer scale in two-dimension (2D). We have developed a low-damage and reproducible sample preparation technique (based on polishing) to prepare samples suitable for EH imaging. Accurate measurements of electro-static potentials across ultra-shallow junctions (both N and P type) by EH have been obtained. Potential profiles derived from ultra-shallow junctions (in the range of 10-30 nm) closely match simulated profiles calculated from secondary ion mass spectroscopy (SIMS) doping profiles of the same junctions. This sets a good baseline for extending the application of electron holography to the quantitative mapping of 2D dopant profiles at close to nanometer spatial resolution.