Abstract

This paper presents use of bit truncation and voltage overscaling to reduce the power consumption of JPEG codecs. Both techniques introduce errors which have to be compensated to minimize quality degradation. To handle the errors due to bit truncation, we propose a compensation scheme based on unbiased estimation of the truncation noise. For 4-bit truncation, such a scheme achieves 23% power savings for DCT with only 0.6 dB drop in PSNR. To compensate for errors due to aggressive voltage scaling, we introduce an algorithm-specific technique which is based on exploiting the characteristics of the quantized coefficients after zig-zag scan. This technique is very effective in improving the PSNR performance with a small circuit overhead. A combination of the two techniques help achieve even higher power savings with only a modest increase in PSNR. For instance, a combination of 4- bit truncation and operating voltage of 0.78V results in 44% power reduction for DCT with a 1.8 dB drop in PSNR performance of the JPEG codec.

Original languageEnglish (US)
Pages (from-to)227-237
Number of pages11
JournalJournal of Signal Processing Systems
Volume69
Issue number3
DOIs
StatePublished - Dec 1 2012

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Keywords

  • Error compensation
  • JPEG
  • Truncation
  • Voltage scaling

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Theoretical Computer Science
  • Signal Processing
  • Information Systems
  • Modeling and Simulation
  • Hardware and Architecture

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