Abstract

Analog weight tuning in resistive memories is attractive for multilevel operation and neuro-inspired computing. To tune the device conductance to the desired states as fast as possible without sacrificing the accuracy, we propose an optimization programming protocol by adjusting the pulse amplitude incremental steps, the pulsewidth incremental steps, and the start voltages. Our experimental results on HfOx-based resistive memories indicate that avoiding over-reset by appropriate programming parameters is critical for fast convergence of the conductance tuning. The over-reset behavior is caused by the stochastic nature of filament formation and rupture, as simulated by a 1-D filament model.

Original languageEnglish (US)
Article number7275091
Pages (from-to)1157-1159
Number of pages3
JournalIEEE Electron Device Letters
Volume36
Issue number11
DOIs
StatePublished - Nov 1 2015

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Computer programming
Tuning
Network protocols
Data storage equipment
Electric potential

Keywords

  • multilevel
  • programming scheme
  • RRAM

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories. / Gao, Ligang; Chen, Pai Yu; Yu, Shimeng.

In: IEEE Electron Device Letters, Vol. 36, No. 11, 7275091, 01.11.2015, p. 1157-1159.

Research output: Contribution to journalArticle

Gao, Ligang ; Chen, Pai Yu ; Yu, Shimeng. / Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories. In: IEEE Electron Device Letters. 2015 ; Vol. 36, No. 11. pp. 1157-1159.
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