Predictive technology modeling for 32nm low power design

Wei Zhao, Xia Li, Matt Nowak, Yu Cao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)
Original languageEnglish (US)
Title of host publication2007 International Semiconductor Device Research Symposium, ISDRS
DOIs
StatePublished - 2007
Event2007 International Semiconductor Device Research Symposium, ISDRS - College Park, MD, United States
Duration: Dec 12 2007Dec 14 2007

Other

Other2007 International Semiconductor Device Research Symposium, ISDRS
CountryUnited States
CityCollege Park, MD
Period12/12/0712/14/07

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Zhao, W., Li, X., Nowak, M., & Cao, Y. (2007). Predictive technology modeling for 32nm low power design. In 2007 International Semiconductor Device Research Symposium, ISDRS [4422430] https://doi.org/10.1109/ISDRS.2007.4422430

Predictive technology modeling for 32nm low power design. / Zhao, Wei; Li, Xia; Nowak, Matt; Cao, Yu.

2007 International Semiconductor Device Research Symposium, ISDRS. 2007. 4422430.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Zhao, W, Li, X, Nowak, M & Cao, Y 2007, Predictive technology modeling for 32nm low power design. in 2007 International Semiconductor Device Research Symposium, ISDRS., 4422430, 2007 International Semiconductor Device Research Symposium, ISDRS, College Park, MD, United States, 12/12/07. https://doi.org/10.1109/ISDRS.2007.4422430
Zhao W, Li X, Nowak M, Cao Y. Predictive technology modeling for 32nm low power design. In 2007 International Semiconductor Device Research Symposium, ISDRS. 2007. 4422430 https://doi.org/10.1109/ISDRS.2007.4422430
Zhao, Wei ; Li, Xia ; Nowak, Matt ; Cao, Yu. / Predictive technology modeling for 32nm low power design. 2007 International Semiconductor Device Research Symposium, ISDRS. 2007.
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