The hierarchal fracture process model is a theory derived from continuum thermodynamics and information theory. This single parameter model provides a non-empirical approach able to predict crack growth for solder interconnects regardless of package or solder interconnect geometry. The model relates inelastic dissipations to the probability of failure at a given material point. The hierarchal fracture process model is used to predict crack growth and fatigue lives in a package with atypical solder interconnect geometry: a quad-flat-no-lead (QFN) package. The fracture model uses the material parameter calibrated for Sn3.8wt%0.7wt%Cu solder in a previous study of wafer-level CSP packages. Finite element models of these packages are created in ABAQUS with the solder interconnects given full creep and plastic properties. The results obtained from the hierarchal fracture process model are validated against the experimentally obtained fatigue lives and cross-sectional images of the crack path.