Power-temperature stability and safety analysis for multiprocessor systems

Ganapati Bhat, Suat Gumussoy, Umit Ogras

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn, higher temperature increases the leakage power exponentially, and leads to a positive feedback with nonlinear dynamics. This paper presents a power-temperature stability and safety analysis technique for multiprocessor systems. This analysis reveals the conditions under which the powertemperature trajectory converges to a stable fixed point. We also present a simple formula to compute the stable fixed point and maximum thermally-safe power consumption at runtime. Hardwaremeasurements on a state-of-the-art mobile processor show that our analytical formulation can predict the stable fixed point with an average error of 2.6%. Hence, our approach can be used at runtime to ensure thermally safe operation and guard against thermal threats.

Original languageEnglish (US)
Article number145
JournalACM Transactions on Embedded Computing Systems
Volume16
Issue number5s
DOIs
StatePublished - Sep 1 2017

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Electric power utilization
Temperature
Energy efficiency
Trajectories
Feedback
Hot Temperature
System-on-chip

Keywords

  • Dynamic thermal and power management
  • Mobile platforms
  • Multi-core architectures
  • Power-temperature stability analysis

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

Cite this

Power-temperature stability and safety analysis for multiprocessor systems. / Bhat, Ganapati; Gumussoy, Suat; Ogras, Umit.

In: ACM Transactions on Embedded Computing Systems, Vol. 16, No. 5s, 145, 01.09.2017.

Research output: Contribution to journalArticle

@article{82de02c6d5424b3a8c99ff27fb16f8ba,
title = "Power-temperature stability and safety analysis for multiprocessor systems",
abstract = "Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn, higher temperature increases the leakage power exponentially, and leads to a positive feedback with nonlinear dynamics. This paper presents a power-temperature stability and safety analysis technique for multiprocessor systems. This analysis reveals the conditions under which the powertemperature trajectory converges to a stable fixed point. We also present a simple formula to compute the stable fixed point and maximum thermally-safe power consumption at runtime. Hardwaremeasurements on a state-of-the-art mobile processor show that our analytical formulation can predict the stable fixed point with an average error of 2.6{\%}. Hence, our approach can be used at runtime to ensure thermally safe operation and guard against thermal threats.",
keywords = "Dynamic thermal and power management, Mobile platforms, Multi-core architectures, Power-temperature stability analysis",
author = "Ganapati Bhat and Suat Gumussoy and Umit Ogras",
year = "2017",
month = "9",
day = "1",
doi = "10.1145/3126567",
language = "English (US)",
volume = "16",
journal = "ACM Transactions on Embedded Computing Systems",
issn = "1539-9087",
publisher = "Association for Computing Machinery (ACM)",
number = "5s",

}

TY - JOUR

T1 - Power-temperature stability and safety analysis for multiprocessor systems

AU - Bhat, Ganapati

AU - Gumussoy, Suat

AU - Ogras, Umit

PY - 2017/9/1

Y1 - 2017/9/1

N2 - Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn, higher temperature increases the leakage power exponentially, and leads to a positive feedback with nonlinear dynamics. This paper presents a power-temperature stability and safety analysis technique for multiprocessor systems. This analysis reveals the conditions under which the powertemperature trajectory converges to a stable fixed point. We also present a simple formula to compute the stable fixed point and maximum thermally-safe power consumption at runtime. Hardwaremeasurements on a state-of-the-art mobile processor show that our analytical formulation can predict the stable fixed point with an average error of 2.6%. Hence, our approach can be used at runtime to ensure thermally safe operation and guard against thermal threats.

AB - Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn, higher temperature increases the leakage power exponentially, and leads to a positive feedback with nonlinear dynamics. This paper presents a power-temperature stability and safety analysis technique for multiprocessor systems. This analysis reveals the conditions under which the powertemperature trajectory converges to a stable fixed point. We also present a simple formula to compute the stable fixed point and maximum thermally-safe power consumption at runtime. Hardwaremeasurements on a state-of-the-art mobile processor show that our analytical formulation can predict the stable fixed point with an average error of 2.6%. Hence, our approach can be used at runtime to ensure thermally safe operation and guard against thermal threats.

KW - Dynamic thermal and power management

KW - Mobile platforms

KW - Multi-core architectures

KW - Power-temperature stability analysis

UR - http://www.scopus.com/inward/record.url?scp=85030665149&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85030665149&partnerID=8YFLogxK

U2 - 10.1145/3126567

DO - 10.1145/3126567

M3 - Article

VL - 16

JO - ACM Transactions on Embedded Computing Systems

JF - ACM Transactions on Embedded Computing Systems

SN - 1539-9087

IS - 5s

M1 - 145

ER -