Abstract
This paper is a detailed technical description of the Progressive Learning Platform (PLP). The PLP system is a System on a Chip design with accompanying tools reflecting a contemporary CPU architecture. The paper is intended to be a reference for users who are interested in using the platform, developers who intend to contribute to the project, educators who would like to adopt PLP in their computer engineering course, and engineering education researchers who would like to use PLP as a vehicle for conducting research. All hardware components of PLP are written in Verilog HDL, are open source, and are freely available. To support the hardware components, a unified assembler, cycle accurate emulator, and board interface software package is included. The software is written in Java, works on Linux, Windows, and Mac OS, is open source, and is freely available. The PLP hardware and software components are licensed under the General Public License version 3 to encourage open access and contribution. All parts of the system are publicly hosted and a public mailing list is used to serve as a communication channel between users and developers of the system.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 215-229 |
| Number of pages | 15 |
| Journal | International Journal of Engineering Education |
| Volume | 29 |
| Issue number | 1 |
| State | Published - 2013 |
Keywords
- Collaborative learning
- Computer science education
- Computer systems organization
- Educational simulations
- Instruction set design
- Learning technologies
- Modeling of computer architecture
- User generated learning content
ASJC Scopus subject areas
- Education
- Engineering(all)