@inproceedings{69aae1795de2453e8c8f2cdeb0808406,
title = "Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design",
abstract = "This paper investigates pipelining methodologies for the ultra low voltage regime. Based on an analytical model and simulations, we propose a pipelining technique that provides higher energy efficiency and performance than conventional approaches to ultra low voltage design. Two-phase latch based design and sequential circuit optimizations are also proposed to further improve energy efficiency and performance. Silicon results demonstrate a 16b multiplier using the approaches in 65nm CMOS improve energy efficiency by 30% and performance by 60%.",
keywords = "Pipeline, Super-pipeline, Ultra Low Power, Ultra Low Voltage",
author = "Mingoo Seok and Dongsuk Jeon and Chaitali Chakrabarti and David Blaauw and Dennis Sylvester",
year = "2011",
doi = "10.1145/2024724.2024943",
language = "English (US)",
isbn = "9781450306362",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "990--995",
booktitle = "2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011",
}