For many years, the computer industry has relied on steady progress in the exponential rate of scaling MOSFETs in integrated circuits. The usual expectation, based on Moore's law, is that the number of transistors able to be packed on a chip doubles roughly every 18 months. Sustaining this pace requires aggressive research into the numerous bottlenecks that threaten to slow it down. Much research has gone into the photolithography needed to produce such dense circuits, device structures that would allow smaller channel lengths, and a plethora of other materials and device advances that help sustain the present rate of scaling. In the past decade, however, another issue has emerged that threatens to impose an absolute limit on how many transistors can be packed onto a die. This is the issue of heat dissipation.
ASJC Scopus subject areas
- Mechanical Engineering
- Electrical and Electronic Engineering