Performance optimal speed control of multi-core processors under thermal constraints

Vinay Hanumaiah, Sarma Vrudhula, Karam S. Chatha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

Advances in chip-multiprocessor processing capabilities has led to an increased power consumption and temperature hotspots. Maintaining the on-chip temperature is important from the power reduction and reliability considerations. Achieving highest performance while maintaining the temperature constraint is a challenge. We develop analytical solutions for the optimal control of frequencies for each core in a chip-multiprocessor. The objective is to reduce the makespan or the latest task completion time of all tasks. We show that the optimal frequency policy is bang-bang when the temperature constraint is not active and is exponential when the temperature constraint is active. We show that there is a significant improvement in overall throughput with our proposed solution and yet all cores operate under the thermal maximum.

Original languageEnglish (US)
Title of host publicationProceedings - 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1548-1551
Number of pages4
ISBN (Print)9783981080155
DOIs
StatePublished - 2009
Event2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09 - Nice, France
Duration: Apr 20 2009Apr 24 2009

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE
ISSN (Print)1530-1591

Other

Other2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09
Country/TerritoryFrance
CityNice
Period4/20/094/24/09

ASJC Scopus subject areas

  • Engineering(all)

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