### Abstract

We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature constant requires an exponential speed curve. Earlier works that propose constant throttling only keep the package/case temperature constant, and are hence suboptimal. We develop high-level thermal and power models that are simple enough for analysis, yet account for important effects like the power-density variation across a chip (hotspots), leakage dependence on temperature (LDT), and differing thermal characteristics of the silicon die and the thermal solution. We use a piecewise-linear approximation for the exponential leakage dependence on temperature, and devise a method to remove the circular dependency between leakage power and temperature. To solve the multi-task speed control problem, we first solve analytically, the single task problem with a constraint on the final package temperature using optimal control theory. We then find the optimum final package temperature of each task by dynamic programming. We compared the total execution time of several randomly generated task sequences using the optimal control policy against a constant speed throttling policy, and found significantly smaller total execution times. We compared the thermal profiles predicted by the proposed high-level thermal model to that of the Hotspot thermal model, and found them to be in good agreement.

Original language | English (US) |
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Title of host publication | CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |

Pages | 257-266 |

Number of pages | 10 |

DOIs | |

State | Published - 2007 |

Event | CASES'07: 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - Salzburg, Austria Duration: Sep 30 2007 → Oct 3 2007 |

### Other

Other | CASES'07: 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
---|---|

Country | Austria |

City | Salzburg |

Period | 9/30/07 → 10/3/07 |

### Fingerprint

### Keywords

- Leakage dependence on temperature
- Power
- Thermal management
- Thermal model
- Throttling

### ASJC Scopus subject areas

- Hardware and Architecture
- Software

### Cite this

*CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems*(pp. 257-266) https://doi.org/10.1145/1289881.1289925

**Performance optimal processor throttling under thermal constraints.** / Rao, Ravishankar; Vrudhula, Sarma.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

*CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems.*pp. 257-266, CASES'07: 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, Salzburg, Austria, 9/30/07. https://doi.org/10.1145/1289881.1289925

}

TY - GEN

T1 - Performance optimal processor throttling under thermal constraints

AU - Rao, Ravishankar

AU - Vrudhula, Sarma

PY - 2007

Y1 - 2007

N2 - We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature constant requires an exponential speed curve. Earlier works that propose constant throttling only keep the package/case temperature constant, and are hence suboptimal. We develop high-level thermal and power models that are simple enough for analysis, yet account for important effects like the power-density variation across a chip (hotspots), leakage dependence on temperature (LDT), and differing thermal characteristics of the silicon die and the thermal solution. We use a piecewise-linear approximation for the exponential leakage dependence on temperature, and devise a method to remove the circular dependency between leakage power and temperature. To solve the multi-task speed control problem, we first solve analytically, the single task problem with a constraint on the final package temperature using optimal control theory. We then find the optimum final package temperature of each task by dynamic programming. We compared the total execution time of several randomly generated task sequences using the optimal control policy against a constant speed throttling policy, and found significantly smaller total execution times. We compared the thermal profiles predicted by the proposed high-level thermal model to that of the Hotspot thermal model, and found them to be in good agreement.

AB - We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature constant requires an exponential speed curve. Earlier works that propose constant throttling only keep the package/case temperature constant, and are hence suboptimal. We develop high-level thermal and power models that are simple enough for analysis, yet account for important effects like the power-density variation across a chip (hotspots), leakage dependence on temperature (LDT), and differing thermal characteristics of the silicon die and the thermal solution. We use a piecewise-linear approximation for the exponential leakage dependence on temperature, and devise a method to remove the circular dependency between leakage power and temperature. To solve the multi-task speed control problem, we first solve analytically, the single task problem with a constraint on the final package temperature using optimal control theory. We then find the optimum final package temperature of each task by dynamic programming. We compared the total execution time of several randomly generated task sequences using the optimal control policy against a constant speed throttling policy, and found significantly smaller total execution times. We compared the thermal profiles predicted by the proposed high-level thermal model to that of the Hotspot thermal model, and found them to be in good agreement.

KW - Leakage dependence on temperature

KW - Power

KW - Thermal management

KW - Thermal model

KW - Throttling

UR - http://www.scopus.com/inward/record.url?scp=38849163446&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=38849163446&partnerID=8YFLogxK

U2 - 10.1145/1289881.1289925

DO - 10.1145/1289881.1289925

M3 - Conference contribution

AN - SCOPUS:38849163446

SN - 9781595938268

SP - 257

EP - 266

BT - CASES'07: Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

ER -