PBExplore: A framework for compiler-in-the-loop exploration of partial bypassing in embedded processors

Aviral Shrivastava, Nikil Dutt, Alex Nicolau, Eugene Earlie

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Scopus citations

Abstract

Varying partial bypassing in pipelined processors is an effective way to make performance, area and energy trade-offs in embedded processors. However, performance evaluation of partial bypassing in processors has been inaccurate, largely due to the absence of bypass-sensitive retargetable compilation techniques. Furthermore no existing partial bypass exploration framework estimates the power and cost overhead of partial bypassing. In this paper we present PBExplore: A framework for Compiler-in-the-Loop exploration of partial bypassing in processors. PBExplore accurately evaluates the performance of a partially bypassed processor using a generic bypass-sensitive compilation technique. It synthesizes the bypass control logic and estimates the area and energy overhead of each bypass configuration. PBExplore is thus able to effectively perform multi-dimensional exploration of the partial bypass design space. We present experimental results on the Intel XScale architecture on MiBench benchmarks and demonstrate the need, utility and exploration capabilities of PBExplore.

Original languageEnglish (US)
Title of host publicationProceedings - Design, Automation and Test in Europe, DATE '05
Pages1264-1269
Number of pages6
DOIs
StatePublished - Dec 1 2005
EventDesign, Automation and Test in Europe, DATE '05 - Munich, Germany
Duration: Mar 7 2005Mar 11 2005

Publication series

NameProceedings -Design, Automation and Test in Europe, DATE '05
VolumeII
ISSN (Print)1530-1591

Other

OtherDesign, Automation and Test in Europe, DATE '05
CountryGermany
CityMunich
Period3/7/053/11/05

    Fingerprint

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Shrivastava, A., Dutt, N., Nicolau, A., & Earlie, E. (2005). PBExplore: A framework for compiler-in-the-loop exploration of partial bypassing in embedded processors. In Proceedings - Design, Automation and Test in Europe, DATE '05 (pp. 1264-1269). [1395767] (Proceedings -Design, Automation and Test in Europe, DATE '05; Vol. II). https://doi.org/10.1109/DATE.2005.236