Parametric variability analysis for multistage analog circuits using analytical sensitivity modeling

Fang Liu, Sule Ozev, Plamen K. Nikolov

Research output: Contribution to journalArticle

2 Scopus citations

Abstract

Process variations play an increasingly important role on the success of analog circuits. State-of-the-art analog circuits are based on complex architectures and contain many hierarchical layers and parameters. Knowledge of the parameter variances and their contribution patterns is crucial for a successful design process. This information is valuable to find solutions for many problems in design, design automation, testing, and fault tolerance. In this article, we present a hierarchical variance analysis methodology for multistage analog circuits. Starting from the process/layout level, we derive implicit hierarchical relations and extract the sensitivity information analytically. We make use of previously computed values whenever possible so as to reduce computational time. The proposed approach is particularly geared for the domain of design and test automation, where multiple runs on slightly different circuits are necessary. Experimental results indicate that the proposed method provides both accuracy and computational efficiency when compared with prior approaches.

Original languageEnglish (US)
Article number33
JournalACM Transactions on Design Automation of Electronic Systems
Volume13
Issue number2
DOIs
StatePublished - Apr 1 2008
Externally publishedYes

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Keywords

  • Analog circuits
  • Hierarchical variance analysis
  • Parameter correlations
  • Performance model
  • Process variations

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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