Optimized Stress Testing for Flexible Hybrid Electronics Designs

Hang Gao, Ganapati Bhat, Umit Ogras, Sule Ozev

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations.

Original languageEnglish (US)
Title of host publication2019 IEEE 37th VLSI Test Symposium, VTS 2019
PublisherIEEE Computer Society
ISBN (Electronic)9781728111704
DOIs
StatePublished - Apr 1 2019
Event37th IEEE VLSI Test Symposium, VTS 2019 - Monterey, United States
Duration: Apr 23 2019Apr 25 2019

Publication series

NameProceedings of the IEEE VLSI Test Symposium
Volume2019-April

Conference

Conference37th IEEE VLSI Test Symposium, VTS 2019
CountryUnited States
CityMonterey
Period4/23/194/25/19

Fingerprint

Electronic equipment
Testing
Linear programming
Robotics
Health
Silicon
Monitoring
Costs

Keywords

  • COMSOL Multiphysics
  • Flexible hybrid electronics
  • integer linear programming
  • stress
  • test

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

Gao, H., Bhat, G., Ogras, U., & Ozev, S. (2019). Optimized Stress Testing for Flexible Hybrid Electronics Designs. In 2019 IEEE 37th VLSI Test Symposium, VTS 2019 [8758661] (Proceedings of the IEEE VLSI Test Symposium; Vol. 2019-April). IEEE Computer Society. https://doi.org/10.1109/VTS.2019.8758661

Optimized Stress Testing for Flexible Hybrid Electronics Designs. / Gao, Hang; Bhat, Ganapati; Ogras, Umit; Ozev, Sule.

2019 IEEE 37th VLSI Test Symposium, VTS 2019. IEEE Computer Society, 2019. 8758661 (Proceedings of the IEEE VLSI Test Symposium; Vol. 2019-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Gao, H, Bhat, G, Ogras, U & Ozev, S 2019, Optimized Stress Testing for Flexible Hybrid Electronics Designs. in 2019 IEEE 37th VLSI Test Symposium, VTS 2019., 8758661, Proceedings of the IEEE VLSI Test Symposium, vol. 2019-April, IEEE Computer Society, 37th IEEE VLSI Test Symposium, VTS 2019, Monterey, United States, 4/23/19. https://doi.org/10.1109/VTS.2019.8758661
Gao H, Bhat G, Ogras U, Ozev S. Optimized Stress Testing for Flexible Hybrid Electronics Designs. In 2019 IEEE 37th VLSI Test Symposium, VTS 2019. IEEE Computer Society. 2019. 8758661. (Proceedings of the IEEE VLSI Test Symposium). https://doi.org/10.1109/VTS.2019.8758661
Gao, Hang ; Bhat, Ganapati ; Ogras, Umit ; Ozev, Sule. / Optimized Stress Testing for Flexible Hybrid Electronics Designs. 2019 IEEE 37th VLSI Test Symposium, VTS 2019. IEEE Computer Society, 2019. (Proceedings of the IEEE VLSI Test Symposium).
@inproceedings{a6e18742d99c4bf2ba650758b0e2cdb9,
title = "Optimized Stress Testing for Flexible Hybrid Electronics Designs",
abstract = "Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations.",
keywords = "COMSOL Multiphysics, Flexible hybrid electronics, integer linear programming, stress, test",
author = "Hang Gao and Ganapati Bhat and Umit Ogras and Sule Ozev",
year = "2019",
month = "4",
day = "1",
doi = "10.1109/VTS.2019.8758661",
language = "English (US)",
series = "Proceedings of the IEEE VLSI Test Symposium",
publisher = "IEEE Computer Society",
booktitle = "2019 IEEE 37th VLSI Test Symposium, VTS 2019",

}

TY - GEN

T1 - Optimized Stress Testing for Flexible Hybrid Electronics Designs

AU - Gao, Hang

AU - Bhat, Ganapati

AU - Ogras, Umit

AU - Ozev, Sule

PY - 2019/4/1

Y1 - 2019/4/1

N2 - Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations.

AB - Flexible hybrid electronics (FHE) is emerging as a promising solution to combine the benefits of printed electronics and silicon technology. FHE has many high-impact potential areas, such as wearable applications, health monitoring, and soft robotics, due to its physical advantages, which include light weight, low cost and the ability conform to different shapes. However, physical deformations in the field can lead to significant testing and validation challenges. For example, designers must ensure that FHE devices continue to meet their specs even when the components experience stress due to bending. Hence, physical deformation, which is hard to emulate, has to be part of the test procedures for FHE devices. This paper is the first to analyze stress experience at different parts of FHE devices under different bending conditions. We develop a novel methodology to maximize the test coverage with minimum number of text vectors with the help of a mixed integer linear programming formulation. We validate the proposed approach using an FHE prototype and COMSOL Multiphysics simulations.

KW - COMSOL Multiphysics

KW - Flexible hybrid electronics

KW - integer linear programming

KW - stress

KW - test

UR - http://www.scopus.com/inward/record.url?scp=85069210734&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85069210734&partnerID=8YFLogxK

U2 - 10.1109/VTS.2019.8758661

DO - 10.1109/VTS.2019.8758661

M3 - Conference contribution

T3 - Proceedings of the IEEE VLSI Test Symposium

BT - 2019 IEEE 37th VLSI Test Symposium, VTS 2019

PB - IEEE Computer Society

ER -