Optimal hardware/software partitioning for concurrent specification using dynamic programming

Aviral Shrivastava, Mohit Kumar, Sanjiv Kapoor, Shashi Kumar, M. Balakrishnan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

An important aspect of hardware-software co-design is partitioning of task to be scheduled on the hardware and software resources. Existing approaches separate partitioning and scheduling in two steps. Since partitioning solutions affect scheduling results and vice versa, the existing sequential approaches may lead to sub-optimal results. In this paper, we present an integrated hardware/software scheduling, partitioning and binding strategy. We use dynamic programming techniques to devise an optimal solution for partitioning of a given concurrent task graph, which models the co-design problem, for execution on one software (single CPU) and several hardware resources (multiple FPGA's), with the objective of minimizing the total execution time. Our implementation shows that we can solve problem instances where the task graph has 40 nodes and 600 edges in less than a second.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Place of PublicationLos Alamitos, CA, United States
PublisherIEEE
Pages110-113
Number of pages4
StatePublished - 2000
Externally publishedYes
EventThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium - Calcutta, India
Duration: Jan 3 2000Jan 7 2000

Other

OtherThe 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium
CityCalcutta, India
Period1/3/001/7/00

Fingerprint

Dynamic programming
Scheduling
Specifications
Hardware
Computer hardware
Program processors
Field programmable gate arrays (FPGA)

ASJC Scopus subject areas

  • Engineering(all)

Cite this

Shrivastava, A., Kumar, M., Kapoor, S., Kumar, S., & Balakrishnan, M. (2000). Optimal hardware/software partitioning for concurrent specification using dynamic programming. In Proceedings of the IEEE International Conference on VLSI Design (pp. 110-113). Los Alamitos, CA, United States: IEEE.

Optimal hardware/software partitioning for concurrent specification using dynamic programming. / Shrivastava, Aviral; Kumar, Mohit; Kapoor, Sanjiv; Kumar, Shashi; Balakrishnan, M.

Proceedings of the IEEE International Conference on VLSI Design. Los Alamitos, CA, United States : IEEE, 2000. p. 110-113.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Shrivastava, A, Kumar, M, Kapoor, S, Kumar, S & Balakrishnan, M 2000, Optimal hardware/software partitioning for concurrent specification using dynamic programming. in Proceedings of the IEEE International Conference on VLSI Design. IEEE, Los Alamitos, CA, United States, pp. 110-113, The 13th International Conference on VLSI Design: Wireless and Digital Imaging in the Millennium, Calcutta, India, 1/3/00.
Shrivastava A, Kumar M, Kapoor S, Kumar S, Balakrishnan M. Optimal hardware/software partitioning for concurrent specification using dynamic programming. In Proceedings of the IEEE International Conference on VLSI Design. Los Alamitos, CA, United States: IEEE. 2000. p. 110-113
Shrivastava, Aviral ; Kumar, Mohit ; Kapoor, Sanjiv ; Kumar, Shashi ; Balakrishnan, M. / Optimal hardware/software partitioning for concurrent specification using dynamic programming. Proceedings of the IEEE International Conference on VLSI Design. Los Alamitos, CA, United States : IEEE, 2000. pp. 110-113
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