Wafer fabrication, the first portion of semiconductor manufacturing, typically involves numerous batch-processing operations. These operations play an important role in determining how the system performs in terms of throughput, WIP and cycle time. In this paper, batch sizes that minimize the expected cycle time of batch-processing operations for a real-world semiconductor manufacturer are determined by a new approximated analytical model. This model, denoted by G/G(bp), represents multiple products, multiple servers, batch-processing, incompatible products and unequal batch service size queues. Incompatible products mean that different products are not allowed to be in the same batch. Unequal batch service size means that batch service sizes depend upon products. Steady-state approximation formulas for cycle time and WIP of this queuing system are derived. These approximate performance measures are compared with those of discrete-event simulation. The results are reasonable and the approximation formulas much more computationally efficient than conducting the corresponding simulation studies. Finally, a batch-processing system with the goal of minimizing the total expected cycle times of items by determining the 'optimal' batch sizes is presented. Solutions are obtained using genetic algorithms.
ASJC Scopus subject areas
- Strategy and Management
- Management Science and Operations Research
- Industrial and Manufacturing Engineering