Operation and data mapping for CGRAs with multi-bank memory

Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and moving the complexity to application mapping. One major challenge comes in the form of data mapping. For reasons of power-efficiency and complexity, CGRAs use multi-bank local memory, and a row of PEs share memory access. In order for each row of the PEs to access any memory bank, there is a hardware arbiter between the memory requests generated by the PEs and the banks of the local memory. However, a fundamental restriction remains that a bank cannot be accessed by two different PEs at the same time. We propose to meet this challenge by mapping application operations onto PEs and data into memory banks in a way that avoids such conflicts. Our experimental results on kernels from multimedia benchmarks demonstrate that our local memory-aware compilation approach can generate mappings that are up to 40% better in performance (17.3% on average) compared to a memory-unaware scheduler.

Original languageEnglish (US)
Title of host publicationLCTES'10 - Proceedings of the ACM SIGPLAN/SIGBED 2010 Conference on Languages, Compilers, and Tools for Embedded Systems
Pages17-25
Number of pages9
DOIs
StatePublished - 2010
EventACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems, LCTES 2010 - Stockholm, Sweden
Duration: Apr 13 2010Apr 15 2010

Publication series

NameProceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Conference

ConferenceACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems, LCTES 2010
CountrySweden
CityStockholm
Period4/13/104/15/10

Keywords

  • arbiter
  • bank conflict
  • coarse-grained reconfigurable architecture
  • compilation
  • multi-bank memory

ASJC Scopus subject areas

  • Software

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