TY - GEN
T1 - Open-source FPGA implementation of post-quantum cryptographic hardware primitives
AU - Agrawal, Rashmi
AU - Bu, Lake
AU - Ehret, Alan
AU - Kinsy, Michel
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/9
Y1 - 2019/9
N2 - The development and implementation of post-quantum cryptosystems have become pressing issues in the design of secure computing systems, as general quantum computers have become more feasible in recent years. In this paper, we introduce a set of FPGA-based post-quantum cryptographic primitives (PQCPs) consisting of four frequently used security components, i.e., public key cryptosystem (PKC), key exchange (KEX), oblivious transfer (OT), and zero-knowledge proof (ZKP). The three main contributions of this work are: (1) FPGA-tailored implementation of the hardware primitives with novel algorithmic proposals of the OT and ZKP; (2) algorithmic optimizations to reduce area and latency costs without compromising security; and (3) open-sourcing the synthesizable and fully verifiable code for the community at large. The RTL code base is fully parameterizable with an efficient, n-point Number-Theoretic Transform (NTT) module for fast polynomial multiplications. These primitives will aid researchers and designers in constructing quantum-proof secure computing systems to prepare for the post-quantum era. Implementation results, on an Zynq-7000 FPGA, show various design trade-offs and correlations between system parameters and the associated hardware cost and latency. The source code for this project is available on the ASCS Lab website at the following URL: http://ascslab.org/research/pqcp/index.html.
AB - The development and implementation of post-quantum cryptosystems have become pressing issues in the design of secure computing systems, as general quantum computers have become more feasible in recent years. In this paper, we introduce a set of FPGA-based post-quantum cryptographic primitives (PQCPs) consisting of four frequently used security components, i.e., public key cryptosystem (PKC), key exchange (KEX), oblivious transfer (OT), and zero-knowledge proof (ZKP). The three main contributions of this work are: (1) FPGA-tailored implementation of the hardware primitives with novel algorithmic proposals of the OT and ZKP; (2) algorithmic optimizations to reduce area and latency costs without compromising security; and (3) open-sourcing the synthesizable and fully verifiable code for the community at large. The RTL code base is fully parameterizable with an efficient, n-point Number-Theoretic Transform (NTT) module for fast polynomial multiplications. These primitives will aid researchers and designers in constructing quantum-proof secure computing systems to prepare for the post-quantum era. Implementation results, on an Zynq-7000 FPGA, show various design trade-offs and correlations between system parameters and the associated hardware cost and latency. The source code for this project is available on the ASCS Lab website at the following URL: http://ascslab.org/research/pqcp/index.html.
KW - FPGA-based prototyping
KW - Key exchange
KW - Oblivious transfer
KW - Post-quantum cryptography
KW - Public-key cryptosystem
KW - Zero-knowledge proof
UR - http://www.scopus.com/inward/record.url?scp=85075640560&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85075640560&partnerID=8YFLogxK
U2 - 10.1109/FPL.2019.00040
DO - 10.1109/FPL.2019.00040
M3 - Conference contribution
AN - SCOPUS:85075640560
T3 - Proceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019
SP - 211
EP - 217
BT - Proceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019
A2 - Sourdis, Ioannis
A2 - Bouganis, Christos-Savvas
A2 - Alvarez, Carlos
A2 - Toledo Diaz, Leonel Antonio
A2 - Valero, Pedro
A2 - Martorell, Xavier
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 29th International Conferenceon Field-Programmable Logic and Applications, FPL 2019
Y2 - 9 September 2019 through 13 September 2019
ER -